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UNIVERSITY OF KERALA - Marian Engineering College

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B.Tech Comp. Sc. & Engg., University of Kerala 58<br />

The exercises may include the following:<br />

03.608 SYSTEM S<strong>OF</strong>TWARE LAB 0 – 0 – 4<br />

1. Design of a single pass assembler for a hypothetical Machine<br />

2. Design of a 2 – pass assembler for a hypothetical machine<br />

3. Design of assembler which generates code with relocation option<br />

4. Design of absolute loader<br />

5. Design of relocating loader<br />

6. Design of macro processor<br />

7. Lexical analysis<br />

8. Operator precedence relations<br />

9. Recursive descent parser<br />

10. First and follow<br />

11. Intermediate code generation<br />

12. Code generation<br />

Internal Continuous Assessment (Maximum Marks-50)<br />

20 Marks - Tests (minimum 1)<br />

20 Marks - Up-to-date lab work, circuit design capability, keeping track of rough record and fair record,<br />

term projects, software exercises, etc.<br />

10 Marks - Regularity in the class<br />

University Examination Pattern (Maximum marks – 100)<br />

Marks should be awarded as follows:<br />

20 Marks - Algorithm/Design.<br />

25 Marks - Viva voce.<br />

30 marks - Implementing the work/Conducting the experiment.<br />

25 Marks - Output/Results and inference.<br />

General instructions:<br />

- Evaluation is a serious process that is to be conducted under the equal responsibility of both the internal and<br />

external examiners.<br />

- The number of candidates evaluated per day should not exceed 20

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