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Interface Selection Guide

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8 Multipoint LVDS (M-LVDS)<br />

➔<br />

M-LVDS Features<br />

M-LVDS Devices from TI<br />

Type 1 Type 2<br />

2.4 V<br />

• TIA/EIA-899 standard<br />

• Driver output current<br />

• 11.3 mA vs. 3.5 mA (LVDS)<br />

• Receiver thresholds<br />

• 50 mV vs. 100 mV (LVDS)<br />

• Driver edge rate control<br />

• 1 ns min allows ease-of-stub design<br />

• Contention provisions<br />

• Driver short circuit limited to 43 mA<br />

• Drivers, receivers and disabled<br />

devices must limit their bus voltage<br />

from 0 to 2.4 V<br />

• Drivers are tested with 32<br />

contending nodes<br />

• TIA/EIA-899 standard compliant<br />

guarantees true multipoint<br />

• Type 1 receivers: 25-mV hysteresis<br />

to prevent oscillation<br />

• Type 2 receivers: internal failsafe<br />

(no external bias network)<br />

• –1-V to 3.4-V common mode<br />

• 3.3-V supply operation<br />

V ID<br />

High<br />

Low<br />

Receiver types.<br />

High<br />

150 mV<br />

50 mV<br />

0 mV<br />

–50 mV<br />

Low<br />

2.4 V<br />

Transition Region<br />

Multipoint LVDS<br />

700 Mbps<br />

600 Mbps<br />

LVDM1676<br />

LVDM1677<br />

500 Mbps<br />

LVDM179<br />

LVDM180<br />

LVDM050<br />

LVDM051<br />

LVDM320<br />

400 Mbps<br />

300 Mbps<br />

200 Mbps<br />

LVDM176<br />

MLVD201<br />

MLVD203<br />

MLVD206<br />

MLVD207<br />

LVDM22<br />

MLVD047<br />

LVDM31<br />

MLVD080<br />

MLVD082<br />

MLVD128<br />

MLVD129<br />

M-LVDS Transceivers<br />

M-LVDS Clock Distribution<br />

(see p. 35 for table)<br />

LVDM: a version of LVDS with<br />

double the output current<br />

100 Mbps<br />

MLVD200A<br />

MLVD202A<br />

MLVD204A<br />

MLVD205A<br />

Single Dual Quad 8-Channel 16-Channel<br />

<strong>Interface</strong> <strong>Selection</strong> <strong>Guide</strong> Texas Instruments 3Q 2005

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