sparc-architecture-2011-1728132

TABLE 4-4
Floating-Point Double-Precision Format Definition
s = sign (1 bit)
e = biased exponent (11 bits)
f = fraction (52 bits)
u = undefined
Normalized value (0 < e < 2047): (−1) s × 2 e−1023 × 1.f
Subnormal value (e = 0): (−1) s × 2 −1022 × 0.f
Zero (e = 0, f = 0) (−1) s × 0
Signalling NaN
Quiet NaN
s = u; e = 2047 (max); f = .0uu--uu
(At least one bit of the fraction must be nonzero)
s = u; e = 2047 (max); f = .1uu--uu
−∞(negative infinity) s = 1; e = 2047 (max); f = .000--00
+∞(positive infinity) s = 0; e = 2047 (max); f = .000--00
4.2.3 Floating Point, Quad Precision (128 bits)
FIGURE 4-10 illustrates all four components (FQ-0 through FQ-3) of the floating-point quad-precision
data format, and TABLE 4-5 describes the formats.
FQ–0
S
exp{14:0}
fraction{111:96}
31 30 16 15
0
FQ–1
fraction{95:64}
31 0
FQ–2
fraction{63:32}
31 0
FQ–3
fraction{31:0}
FIGURE 4-10 Floating-Point Quad-Precision Data Format
31 0
TABLE 4-5
Floating-Point Quad-Precision Format Definition
s = sign (1 bit)
e = biased exponent (15 bits)
f = fraction (112 bits)
u = undefined
Normalized value (0 < e < 32767): (-1) s × 2 e−16383 × 1.f
Subnormal value (e = 0): (-1) s × 2 −16382 × 0.f
Zero (e = 0, f = 0) (-1) s × 0
Signalling NaN
s = u; e = 32767 (max); f = .0uu--uu
(At least one bit of the fraction must be nonzero)
28 Oracle SPARC Architecture 2011 • Draft D0.9.5d, 18 Jul 2012