PIC18F97J60 Family Device Data Sheet - CNMAT
21.01.2015 • Views
Share Embed Flag

PIC18F97J60 Family Device Data Sheet - CNMAT

PIC18F97J60 Family Device Data Sheet - CNMAT

PIC18F97J60 Family Device Data Sheet - CNMAT

SHOW MORE
SHOW LESS
ePAPER READ
DOWNLOAD ePAPER
cnmat.berkeley.edu

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

START NOW

<strong>PIC18F97J60</strong> FAMILY<br />

FIGURE 1-2:<br />

PIC18F86J60/86J65/87J60 (80-PIN) BLOCK DIAGRAM<br />

Table Pointer<br />

<strong>Data</strong> Bus<br />

inc/dec logic<br />

21<br />

20<br />

PCLATU PCLATH<br />

8 8<br />

PCU PCH PCL<br />

Program Counter<br />

<strong>Data</strong> Latch<br />

<strong>Data</strong> Memory<br />

(3808 Bytes)<br />

Address Latch<br />

12<br />

<strong>Data</strong> Address<br />

PORTA<br />

RA0:RA5 (1)<br />

PORTB<br />

RB0:RB7 (1)<br />

Address Latch<br />

Program Memory<br />

(64, 96, 128 Kbytes)<br />

<strong>Data</strong> Latch<br />

31 Level Stack<br />

STKPTR<br />

4 12 4<br />

BSR<br />

FSR0<br />

Access<br />

Bank<br />

FSR1<br />

FSR2 12<br />

PORTC<br />

RC0:RC7 (1)<br />

8<br />

Table Latch<br />

inc/dec<br />

logic<br />

PORTD<br />

RD0:RD2 (1)<br />

Instruction Bus <br />

ROM Latch<br />

Address<br />

Decode<br />

IR<br />

PORTE<br />

RE0:RE7 (1)<br />

8<br />

OSC2/CLKO<br />

OSC1/CLKI<br />

ENVREG<br />

Timing<br />

Generation<br />

INTRC<br />

Oscillator<br />

Precision<br />

Band Gap<br />

Reference<br />

Voltage<br />

Regulator<br />

Instruction<br />

Decode &<br />

Control<br />

Power-up<br />

Timer<br />

Oscillator<br />

Start-up Timer<br />

Power-on<br />

Reset<br />

Watchdog<br />

Timer<br />

Brown-out<br />

Reset (2)<br />

State Machine<br />

Control Signals<br />

3<br />

BITOP<br />

8<br />

PRODH PRODL<br />

8 x 8 Multiply<br />

8<br />

W<br />

8 8<br />

8<br />

8<br />

ALU<br />

8<br />

PORTF<br />

RF1:RF7 (1)<br />

PORTG<br />

RG0:RG4 (1)<br />

PORTH<br />

RH0:RH7 (1)<br />

PORTJ<br />

VDDCORE/VCAP<br />

VDD, VSS<br />

MCLR<br />

RJ4:RJ5 (1)<br />

ADC<br />

10-Bit<br />

Timer0<br />

Timer1<br />

Timer2<br />

Timer3<br />

Timer4<br />

Comparators<br />

ECCP1<br />

ECCP2 ECCP3 CCP4 CCP5<br />

EUSART1<br />

EUSART2<br />

MSSP1<br />

Ethernet<br />

Note 1: See Table 1-5 for I/O port pin descriptions.<br />

2: BOR functionality is provided when the on-board voltage regulator is enabled.<br />

DS39762D-page 14 Preliminary © 2008 Microchip Technology Inc.

logo

products

Resources

Company

Terms of service
Privacy policy
Cookie policy
Cookie settings
Imprint
Change language
Made with love in Switzerland
© 2024 Yumpu.com all rights reserved

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!