Boolean Satisfiability (SAT) Algorithms

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Refresh: Implication graph, resolution, and learning a = 1 a = 1 a1 = 0 a2 = 1 a3 = 1 Decision level 1 b = 0 b = 0 b1 = 0 b2 = 1 b3 = 0 b4 = 1 2 c = 0 c = 0 c1 = 0 c2 = 1 (1): (c2’ + g) (2): (b4’ + c4 + g’) (3): (a2’ + c3’ + c4’) (4): (c1 + c3) (5): (b1 + c1 + c2) 5 4 c3 = 1 c4 = 0 g = 0 3 2 1 g = 1 (b4’ + c2’ + c4) (a2’ + b4’ + c2’ + c3’) (a2’ + b4’ + c1 + c2’) (a2’ + b1 + b4’ + c1) 3 Boolean SAT Algorithms / FLOLAC 2009 Prof. Chung-Yang (Ric) Huang http://dvlab.ee.ntu.edu.tw 226
Extraction of Unsatisfiability Core 1. For each conflict, record the resolution graph for the learned clause 2. A learned clause may depend on other learned clause, so does its resolution graph may build upon other’s resolution graph 3. The root clauses for the last conflict (i.e. conflict at decision level 0) will be the unsatisfiability core Boolean SAT Algorithms / FLOLAC 2009 Prof. Chung-Yang (Ric) Huang http://dvlab.ee.ntu.edu.tw 227
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Boolean Satisfiability (SAT) Algori
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What is Verification What’s the p
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#Transistors in Intel’s CPUs Year
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What is Verification What’s the p
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And of course, don’t forget the i
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Improvement on Floating-Point Execu
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A 3-D plot of the ratio 4195835/314
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Aftermath... Intel hired 1000+ PhD
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How do you verify your design Bool
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Simulation-Based Verification Testb
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Like Finding a Bug in an Ocean… B
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Then why is simulation still the ma
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And of course, simulation approach
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Using hardware to speed up simulati
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Verification vs. Testing Objective
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Observability Problem --- Solved In
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The Fact More than 90% of properti
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ABV Example --- OVL module assert_n
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Any Problem Whose Problem “My big
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Think --- If you simulate your desi
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Simulation and Assertion-Based Veri
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Formal Verification Technologies De
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Proving “assert_always(p)” In
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Set of Reachable States t0 t1 t2 t3
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Combinational Invariance It is wor
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In this topic, we will use SAT engi
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Boolean Satisfiability (SAT) Fundam
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Complexity of SAT solver We have le
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Something like --- A Decision Tree
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Boolean Satisfiability Checking for
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A Typical Combinational SAT Algorit
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A Typical Combinational SAT Algorit
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a b c d combSat (g7, 0) 1 g1 g2 g3
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a b c d combSat (d, 1) 1 1 g1 g2 g3
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a b c d combSat (d, 1) 1 1 g1 g2 g3
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How many decisions did we make Ther
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Logic Implications Also called “
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How to schedule and evaluate these
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Trying to avoid fruitless implicati
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What’s the improvement Worse case
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Sounds good for all-1’s forward i
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2-Watched-Literal Algorithm H. Zhan
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2-Watched-Literal Algorithm Example
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Caching Effect: Reducing from O(n)
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Difference between circuit and CNF
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Any problem Remember there is only
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A Closer Look 0 1 1 0 0 0 11 1 11 1
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Direct Implication 1. Single source
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Direct vs. Indirect Implications 0
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Watch Scheme for XOR Gate n-input
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Applications of Logic Implication W
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Redundancy in a Combinational Circu
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Mandatory Assignment Example (1) Fa
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1. How do we know a wire in a combi
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How to add an extra wire to make th
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RAMBO: Redundancy Addition and remo
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Is (g5 g9) redundant c 0 b 0 g1 1
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Filtering Out Impossible Candidate
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How do we add “something” to a
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A Two-Way Redundancy Addition and R
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RAR Example (w t : g6 g7) c g4 0 0
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2-Way RAR Algorithm 1. Given a targ
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Creating a Redundant Gate (2) g s1
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A closer look at the previous examp
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Single Wire Replacement Theorem in
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A closer look... MA(w t ) a MA(g d
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SRAR-Wire vs. Original RAMBO (FYI)
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Single Gate Replacement in SatRAR *
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Alternative Sub-circuit by SatRAR M
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CNF-Based SAT Algorithm 1. Davis, P
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Davis Putnam Algorithm M .Davis, H.
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Basic DLL Procedure - DFS (a’ + b
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Potentially exponential complexity!
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Conflict-Driven Learning (a’ + b
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Non-Chronological Backtracking (a
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Deduced Implication from Learned Cl
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Deduced Implication from Learned Cl
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A Closer Look at the Implication Gr
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Conflict Analysis 2 a = 1 a = 1 a1
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Which constraint is the best to add
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Conflict-Driven Learning Decision l
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A closer look at binary decision tr
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Conflict-Driven Non-Chronological B
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What we have learned on SAT... 1. E
Page 175 and 176: Static Decision Ordering Decision
Page 177 and 178: zChaff’s Variable State Independe
Page 179 and 180: More decision heuristics... Variabl
Page 181 and 182: Remember when we talked about confl
Page 183 and 184: Various Learning Techniques Other
Page 185 and 186: Learned by Signal Correlations A p
Page 187 and 188: Conflict vs. Success-Driven Learnin
Page 189 and 190: Success-Driven Learning Ref: Shuo,
Page 191 and 192: What can we do to make the learning
Page 193 and 194: Recalled, the SAT algorithms we hav
Page 195 and 196: SAT-Based Verification We know tha
Page 197 and 198: However, in the above approach, we
Page 199 and 200: Bounded Model Checking (BMC) Algori
Page 201 and 202: Application of BMC If the property
Page 203 and 204: K-induction Induction: SSS2000 •
Page 205 and 206: Induction SAT for (k = 0 to infinit
Page 207 and 208: Does “Induction SAT” guarantee
Page 209 and 210: Induction over simple paths Let sim
Page 211 and 212: Is the recurrence diameter the same
Page 213 and 214: Outline Overview of Hardware Verif
Page 215 and 216: Symbolic model checking without BDD
Page 217 and 218: Limitation of Formal Engine Still
Page 219 and 220: Localization abstraction Property:
Page 221 and 222: Image and over-approximated image
Page 223 and 224: Remember: Resolution a ∨ b ∨ ¬
Page 225: Generating refutations Refutation
Page 229 and 230: Some Definitions for Unsatisfiabili
Page 231 and 232: Interpolants from Proofs Deriving
Page 233 and 234: SAT to compute set of reachable sta
Page 235 and 236: Overapproximation An overapproxima
Page 237 and 238: Adequate image Img(P,C) P Img’(P,
Page 239 and 240: Huh A A' B P C C C C C C C F A ⇒
Page 241 and 242: Reachability algorithm let k = 0 re
Page 243 and 244: Interpolation-based MC Fully SAT-ba
Page 245 and 246: Conclusion on Boolean SAT Algorithm
Page 247 and 248: Some popular SAT engines SATO •
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Boolean Satisfiability (SAT) Algorithms

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