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Bulk Dielectric Constant (k)
Lowering Interconnect Power Consumption
Industry Challenge
Interconnect power is ~⅓
of total chip power consumption *
Technology Enabler
Lowering the dielectric constant, k, improves
insulation & lowers device power use
3.6
3.2
2.8
2.4
2
4 USG FSG
k ~ 3.6
Black
Diamond
k ~ 3.0
Black
Diamond
Black
II k ~ 2.5
Diamond 3
Lowering interconnect
k ~2.2
power by ~10%** per gen.
130nm 90/65nm 45/32nm 22/15nm
Logic Technology Node (nm)
*Source: Chandra, G.; Kapur, P.; Saraswat, K.C.; "Scaling trends for the on chip power dissipation”
**Source: Tada, M.; Inoue, N.; Hayashi, Y.; , "Performance Modeling of Low- /Cu Interconnects for 32-nm-Node and Beyond
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APPLIED MATERIALS- EXTERNAL USE