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Logic Devices - Engineering the High-k Stack Layers Industry Challenge Technology Enabler DPN / RPN ALD HfO Cap High-k Interface Layer RadOx iL Centura ® Dielectric Gate Stack Source Drain 2 nm Si ALD Cap TiN Siconi Clean Atomic-scale engineering Material stability Interface layer precision + Endura ® Metal Gate 16 APPLIED MATERIALS- EXTERNAL USE
Engineering Efficiency into products (examples) Centris AdvantEdge Mesa : ETCH ~35% improvement in energy savings Olympic-size swimming pool of water saving/year CMP Reflexion GT 29% improvement in energy savings 45% improvement in electrical usage 17 APPLIED MATERIALS- EXTERNAL USE
Page 1 and 2: Energy Efficiency in Electronics Ge
Page 3 and 4: At A Glance Fiscal 2011 Revenue: $1
Page 5 and 6: Applied Materials Green Initiatives
Page 7 and 8: Setting Aggressive Goals CORPORATE
Page 9 and 10: Trillion Billion Million LOW COST T
Page 11 and 12: Tool Efficiency = GHG/Energy Opport
Page 13 and 14: Applied Materials Strategies to Red
Page 15: DRAM - Approaches to Lowering Power
Page 19: Summary • Improving the energy ef

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