Filter Design

Circuits 212 Lab
Lab #6
Filter Design
The purpose of this lab is multifold. This is a three-week experiment. You are required to
design a High / Low Pass filter using the LM318 OP AMP. In this lab, you’ll follow the
process of building any system: The three major steps being:
1. Design
2. Simulation
3. Testing
That is the broad overview of the three weeks of this lab.
The aim of this experiment
1. To design a First Order Low Pass OR a High Pass Filter using an Op-Amp and a
designated capacitor as the frequency determining component.
2. Build the low-pass or high-pass filter of your design and check its frequency
response. Drive the circuit with a sine wave and record input (constant) and output
voltage for different frequencies.
Introductions:
In this experiment you will design, build, and test the filters. The configurations you build
are:
Active Low Pass Filter / Active High Pass Filter
For the configurations you will
Design the filter for a specified Cut-off Frequency & Gain (your TA will designate
cutoff frequency (between 1 kHz and 10 kHz) and gain (5V/V, 10V/V or 15V/V) for
each team)
Simulate the design using PSpice.
Layout the board using PCB Editor.
Construct the circuit on the PCB
Test and characterize the designed circuit.
Frequency Response of Filters:
The most common filters are:
1. Low Pass Filters (LPF)
2. High Pass Filters (HPF)
3. Band Pass Filters (BPF)
4. Band Reject Filters (also called Band Stop Filters BSF)
You’ll be building either an LPF or an HPF in this lab. The typical Frequency response of
these filters is as shown below:
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Components Required for the Lab:
These are your design constraints for this Lab: You are required to use the LM318
Operational Amplifier, and the 0.22uF capacitor as one of the two frequency determining
components. All other resistor & capacitor values are determined by your design
calculations, but you may only use standard value components in the EECS Shop.
Standard Values will be discussed in the lab.
Circuit Diagram:
Your circuit configuration looks something like this:
Low Pass
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HIGH PASS
Note that the op-amp is used in its non-inverting mode (the input is connected to pin 3).
The resistor-capacitor configuration between the input and the op-amp's non-inverting
input provides the desired filtering.
Procedure:
Week 1:
1. Design a Filter for the given Cut-off Frequency and Gain. The Relevant Equations
for both Low pass & High pass circuits are:
Gain: = 1 + R F / R G
Cut off Frequency = 1 / (2 π RC)
Note: Use C = 0.22uF for the capacitor in the filter network.
Select R F and R G between 1 [k] and 50 [k]. If R F and R G are less than 100
[] (chosen to be 1 [k] or greater for a safety margin) too much current will flow
through the feedback loop, and the LM 318 will be damaged. If R F and R G are
greater than 50 [k] not enough current will flow through the feedback loop, and
will invalidate some of the other practical assumptions of the LM 318.
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2. Simulate the circuit that you designed in PSpice. Use appropriate standard values
of resistors. Be careful to only pick values available in the EECS shop. Determine
the power supply filter capacitors by looking at the LM 318 datasheet on the lab
website. Follow the steps below to create the circuit simulation. If you do not
follow the steps below the simulation will work, but the circuit will not
transfer to PCB Editor correctly.
Creating your Circuit Schematic in Allegro Design Entry CIS (PSpice) so it is
compatible with PCB Editor
a. Create a new “Analog or Mixed A/D” blank project.
b. Select and delete all libraries currently in the “Libraries” field. The only library
left will be the Design Cache (because it may not be deleted), but do not use
any of its parts.
→
c. Add the libraries located in the following folder:
P:\Cadence\SPB_16.3\tools\capture\library\pspice\EECS libs
→
d. Create your schematic for simulation using the components in this folder.
The recommended components are:
Resistor – R/ANALOG
Capacitor – C disc/ANALOG
OP Amp – LM318
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3. Bias the op-amp with a ±12 V supply. Apply an AC signal of 1Vpp to the Input.
4. Obtain the Frequency Response (the Bode Plot – magnitude and phase) of the
filter using PSpice.
5. After you have completed steps 1 through 5 and you have been approved by your
TA order your components from the EECS shop. YOU ARE REQUIRED TO
SAVE A RECORD OF YOUR ORDERED PARTS LIST TO BE SUBMITTED IN
THE LAB REPORT. Once you have ordered your components you may pick up
the components next week before lab, or whenever the EECS shop has them
finished (The EECS shop will probably not have your order finished the same day
you submit the order).
6. Once the circuit has been analyzed using PSpice, the schematic must be modified
for fabrication before proceeding to PCB Editor. Test Points need to be inserted at
the input, output and at the two supply voltage pins. These test points allow a
convenient point to attach probes for sources and test measurement. TPs are
available in the connector library. Below is an illustration of using test points on
an “example” circuit.
**Note that the above circuit is just an example.
**
Vac_+
V_DC_Supply _5Vdc_+
1Vac
0Vdc
1
TEST POINT
1
TEST POINT
5Vdc
1
1
TEST POINT
TEST POINT
V_DC_Supply _5Vdc_-
Vac_-
7. After your simulation circuit has been modified with test points, create the PCB
Layout using the LP/HP filter circuit you have already developed in PSpice. Refer
to the Circuit Board Fabrication Tutorial for 212 Lab handout to create the PCB
Layout of the circuit. This must be completed before the start of Week 2.
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Week 2:
1. Once trace routing is completed, print your circuit onto the Toner Transfer
Paper (without the SST layer) and transfer it on to the circuit board using the
fuser.
**
**Note the board layout above is a depiction of the previous example circuit.
2. Etch the boards in the Sodium Persulphate tank to remove excess copper,
leaving the desired traces.
3. Remove any excess toner left on traces and pads. Carefully drill holes
wherever required. Use safety glasses when drilling.
4. You are advised, but not required to build your circuit on a breadboard before
you solder your components, and test its characteristics.
5. If you finish Week 2 early you are highly advised to start Week 3.
Week 3:
1. Solder the components on your PCB to build your circuit.
2. Apply an input sine wave of 1 KHz, 1Vpp to the input and plot the output signal.
3. Measure the frequency response of the amplifier from 100 Hz to 100 kHz by
measuring the output amplitude for different frequencies of the input sine wave.
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Observations
Table: Filter gain versus frequency
Frequency
[kHz]
Vin
[V]
Vout
[V]
0.1
0.2
0.5
0.75
1
2
3
4
5
6
7
8
9
10
15
20
50
100
Gain
[V/V]
Gain [dB] =
20log 10 |Vout/Vin|
1. Use your experimentally measured values to plot the magnitude of the Gain [dB]
( | |) of the frequency response (the Bode plot) with Excel. Plot the
magnitude (on a linear scale) on the ordinate axis and frequency (on a log scale) on
the abscissa axis. This is the magnitude portion of the Bode plot.
2. Use your experimentally measured values to plot the Gain [V/V] ( ) with Excel.
Plot the magnitude (on a log scale) on the ordinate axis and frequency (on a log
scale) on the abscissa axis.
3. Compare the plot of of your experimentally measured values to your PSpice
simulation of of the circuit. Or, you may compare the plot of | | of
your experimentally measured values to your PSpice simulation of | |.
4. You are required to include the following PSpice plots:
a) (log scale) vs. frequency (log scale)
b) | | (linear scale) vs. frequency (log scale)
i. Consult Prelab 5 for how to plot | | in PSpice.
5. Determine the cut off frequency from the plot of | | (linear scale) vs.
frequency (log scale) and compare it to the theoretical value.
6. Compare the actual and theoretical 20 Log (1 + R F /R G ) pass band gains.
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