A 90 nm Communication Technology Featuring SiGe HBT ...

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Outline • Technology Features • CMOS • SiGe:C HBT • Isolation IEDM 2002 22
Isolation: P-P versus P+ epi (with DNW) -20 Guard ring on p+ epi (LoRes) -40 Guard ring on p- (HiRes) S21 (dB) -60 -80 DNW on P- (HiRes) DNW on P+ epi (LowRes) -100 10 MHz 100 MHz 1 GHz 10 GHz 100 GHz FREQUENCY S21 = forward transmission gain/loss IEDM 2002 23
Page 1 and 2: A 90 nm Communication Technology Fe
Page 3 and 4: Baseline CMOS • Shallow Trench Is
Page 5 and 6: Matching Circuit Needs to Device Ty
Page 7 and 8: Matching Circuit Needs to Device Ty
Page 9 and 10: 90nm CMOS Performance versus Low Po
Page 11 and 12: F T : Intrinsic NMOS Performance FT
Page 13 and 14: Fmax: : Layout • Make R G small T
Page 15 and 16: Outline • Technology Features •
Page 17 and 18: SiGe:C HBT Architecture Extrinsic b
Page 19 and 20: Baseline: 130/100 F T /F /F MAX H21
Page 21: BJT Yield issues: impact of volume
Page 25 and 26: Substrates: Latch-up, P-P versus P+
Page 27 and 28: MIM Capacitor 1.10 M7 SiN V6 Ta M6
Page 29 and 30: MIM Capacitor Reliability OLD Proce
Page 31 and 32: Hi-Q Q Inductor Library Templates 6
Page 33 and 34: Measured versus simulated Q Inducto
Page 35 and 36: Outline • Technology Features •
Page 37 and 38: Intel CMOS 10G SerDes Test Circuit
Page 39 and 40: Acknowledgment The authors grateful
Page 41 and 42: References 9. Min Park; Seonghearn

A 90 nm Communication Technology Featuring SiGe HBT ...

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