Intel IXA SDK ACE Programming Framework - Department of ...

MicroACE Support Services
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An ACE classifies incoming packets according to rules and protocol definitions
that you write in NCL. For more information, see Chapter 9, “Classifying Packets
Using NCL.”
ACEs and other objects communicate using a remote procedure call mechanism
called a crosscall. You define the interfaces for the crosscalls in IXA IDL. For more
information, see Chapter 11, “Communication Within an Application.”
Error Handling
Most API functions return an error token, which is a value of type ix_error. An error
token of zero indicates that the function was successful. When a call is unsuccessful,
it returns a non-zero token that is associated with a descriptive string giving information
about the failure.
The ASL defines a set of functions for retrieving the messages associated with error
tokens, and a set of macros that provide additional context information for errors. It
also provides functions you can use to add your own uniquely numbered error codes
to provide information about failed operations in your own functions.
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The error handling functions and macros are describe in Chapter 4, “The ASL
Core Support Package API,” of the IXA SDK Reference.
The predefined error codes are listed and described in Appendix A, “IXA API
Error Codes,” of the IXA SDK Reference.
MicroACE Support Services
Conventional ACEs run on a general-purpose processor. To achieve higher performance,
ACEs can use other special-purpose processors for acceleration. An ACE that
offloads fast-path processing to an IXP1200 microengine is known as a microACE.
A microACE combines a core component, a complete ACE that runs on the core
processor, with a microblock.
1. Write the microblock in microcode, the assembler language for the IXP1200
microengines.
2. Combine several microblocks with a dispatch loop, also in microcode, that defines
a packet processing pipeline for a microblock group.
3. Compile the microblocks and dispatch loop into a single-object image (a .uof file)
that runs on a single microengine.
To write and compile microcode, use the IXP1200 Microengine Development Environment.
The IXP1200 microcode documentation is accessible from the following
directory:
C:IXP1200\documentation\IXP1200 Documentation
MicroACEs and their managing programs communicate with the microengines
using the Resource Manager. The Resource Manager is system software that runs in the
core processor kernel. It does resource allocation for memory that is shared by the
core processor and the microengines, and also handles packet demultiplexing and
other system-level microengine management problems.
24 Elements of an Application
Revision 3.3, August 2001