Unit I

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On-Chip MemoryInternal RAMM.Balakarthikeyan -
Registers1F1817Bank 3Bank 2Four Register BanksEach bank has R0-R7Selectable by psw.2,3100FBank 1080706050403020100R7R6R5R4R3R2R1R0Bank 0M.Balakarthikeyan -
Page 1 and 2: The 8051MicrocontrollerM.Balakarthi
Page 3 and 4: Block DiagramExternal InterruptsInt
Page 5 and 6: Three criteria in Choosing aMicroco
Page 7: Comparison of the 8051 Family Membe
Page 10 and 11: 8051Foot Print123456789101112131415
Page 12 and 13: Port 3 Alternate FunctionsM.Balakar
Page 14 and 15: Hardware Structure of I/O PinRead l
Page 16 and 17: Writing “1” to Output Pin P1.XR
Page 18 and 19: Reading “High” at Input PinRead
Page 20 and 21: Port 0 with PullUp ResistorsVcc10
Page 22 and 23: Pins of 8051 Vcc ( pin 40 ):Vcc pro
Page 24 and 25: XTAL Connection to an External Cloc
Page 26 and 27: Pins of 8051 RST ( pin 9 ): reset i
Page 28 and 29: RESET Value of Some 8051 Registers:
Page 30 and 31: Pins of 8051 ALE ( pin 30 ): addres
Page 32 and 33: Address Multiplexingfor External Me
Page 34 and 35: Accessing ExternalData MemoryFigure
Page 36 and 37: External code memoryWRRDPSENALEP0.0
Page 38 and 39: Overlapping External Codeand Data S
Page 40 and 41: Overlapping External Codeand Data S
Page 44 and 45: Bit Addressable Memory2F2E2D2C2B2A2
Page 46 and 47: Bit Addressable RAMFigure 2-6Summar
Page 48 and 49: M.Balakarthikeyan -
Page 50 and 51: M.Balakarthikeyan -
Page 52 and 53: RegistersM.Balakarthikeyan -
Page 54 and 55: The 8051Assembly LanguageM.Balakart
Page 56 and 57: Data Transfer Instructions MOV dest
Page 58 and 59: Addressing ModesImmediate Mode - co
Page 60 and 61: Addressing ModesDirect Mode - speci
Page 62 and 63: Addressing ModesRegister Indirect -
Page 64 and 65: Addressing ModesRegister Indexed Mo
Page 66 and 67: Acc Register A register can be acce
Page 68 and 69: SFRs AddressAll SFRs such as(ACC, B
Page 70 and 71: 8051 Instruction Format Register ad
Page 72 and 73: 8051 Instruction Format relative ad
Page 74 and 75: Stackspushpopstack pointerstackGo d
Page 76 and 77: Stack (push,pop) ThereforePush aPus
Page 78 and 79: Bit-Oriented Data Transfer transfer
Page 80 and 81: Data Processing InstructionsArithme
Page 82 and 83: Arithmetic InstructionsMnemonicADD
Page 84 and 85: Instructions that Affect PSW bitsM.
Page 86 and 87: Signed Addition and Overflow2’s c
Page 88 and 89: The 16bit ADD example; Computes Z
Page 90 and 91: Increment and DecrementINC AINC byt
Page 92 and 93:
MultiplyWhen multiplying two 8bit
Page 94 and 95:
Decimal AdjustDA a; decimal adjust
Page 96 and 97:
Bitwise LogicANL ANDORL ORXRL XO
Page 98 and 99:
Uses of Logic Instructions Force in
Page 100 and 101:
CLR ( Set all bits to 0)CLR ACLR by
Page 102 and 103:
Rotate through CarryRRC aCmov a, #0
Page 104 and 105:
SwapSWAP amov a, #72h ; a 27hswap
Page 106 and 107:
Program Flow Control Unconditional
Page 108 and 109:
Infinite LoopsStart: mov C, p3.7mov
Page 110 and 111:
Jump tableMov dptr,#jump_tableMov a
Page 112 and 113:
Conditional jumpsMnemonicDescriptio
Page 114 and 115:
More Conditional JumpsMnemonicCJNE
Page 116 and 117:
Iterative Loops(examples)mov a,#50h
Page 118 and 119:
Return Return is also similar to a
Page 120 and 121:
Initializing Stack Pointer SP is in
Page 122 and 123:
Subroutine - another example; Progr
Page 124 and 125:
example of delaymov a,#0aahBack1:mo
Page 126 and 127:
Example; Move string from code memo
Page 128 and 129:
Example; duty cycle 50%back: cpl p1
Page 130 and 131:
M.Balakarthikeyan -8051 timer
Page 132 and 133:
Interrupt Sources Original 8051 has
Page 134 and 135:
Interrupt Priorities What if two in
Page 136 and 137:
Interrupt VectorsEach interrupt has
Page 138:
Example Interrupt Service Routine;E
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Unit I

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