SDIO Simplified Specification - SD Association

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationRevision HistoryDate Version Changes compared to previous issueApril 3, 2006 1.10 The first release of the SDIO Simplified SpecificationFebruary 8, 2007 2.00 Followings functions are added in this version(1) Added method to change bus speed (Normal Speed up to 25MHz andHigh Speed up to 50 MHz)(2) Operational Voltage Requirement is extended to 2.7-3.6V(3) Combine sections 12 (Physical Properties) and 13 (MechanicalExtensions) and add miniSDIO to the new section 13 (PhysicalProperties)(4) Add Embedded SDIO ATA Standard Function Interface Code(5) Reference of Physical Ver2.00 supports SDHC combo card.(6) Some typos in Ver1.10 are fixed.February 25, 2011 3.00 Followings functions are added in this version(1) Definition of Embedded SDIO(2) Ultra High Speed Bus Speed Mode (UHS-I)(3) Power Control Extension (Power State Control)(4) Asynchronous Interrupt in 4-bit mode(5) Shared Bus for supporting multiple devices(6) Interface Signal of Embedded Device applicable to Shared BusAsynchronous Interrupt is not included in this document.i

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationRelease of SD Simplified SpecificationThe following conditions apply to the release of the SD simplified specification ("Simplified Specification")by the SD Card Association. The Simplified Specification is a subset of the complete SD Specificationwhich is owned by the SD Card Association.Publisher and Copyright Holder:SD Card Association2400 Camino Ramon, Suite 375San Ramon, CA 94583 USATelephone: +1 (925) 275-6615,Fax: +1 (925) 886-4870E-mail: office@sdcard.orgNotes:This Simplified Specification is provided on a non-confidential basis subject to the disclaimers below. Anyimplementation of the Simplified Specification may require a license from the SD Card Association orother third parties.Disclaimers:The information contained in the Simplified Specification is presented only as a standard specification forSD Cards and SD Host/Ancillary products and is provided "AS-IS" without any representations orwarranties of any kind. No responsibility is assumed by the SD Card Association for any damages, anyinfringements of patents or other right of the SD Card Association or any third parties, which may resultfrom its use. No license is granted by implication, estoppel or otherwise under any patent or other rights ofthe SD Card Association or any third party. Nothing herein shall be construed as an obligation by the SDCard Association to disclose or distribute any technical information, know-how or other confidentialinformation to any third party.ii

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationConventions Used in This DocumentNaming Conventions• Some terms are capitalized to distinguish their definition from their common English meaning. Wordsnot capitalized have their common English meaning.Numbers and Number Bases• Hexadecimal numbers are written with a lower case "h" suffix, e.g., FFFFh and 80h.• Binary numbers are written with a lower case "b" suffix (e.g., 10b).• Binary numbers larger than four digits are written with a space dividing each group of four digits, as in1000 0101 0010b.• All other numbers are decimal.Key Words• May: Indicates flexibility of choice with no implied recommendation or requirement.• Shall: Indicates a mandatory requirement. Designers shall implement such mandatoryrequirements to ensure interchangeability and to claim conformance with the specification.• Should: Indicates a strong recommendation but not a mandatory requirement. Designers should givestrong consideration to such recommendations, but there is still a choice in implementation.Application NotesSome sections of this document provide guidance to the host implementers as follows:Application Note:This is an example of an application note.iii

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationTable of Contents1. General Description............................................................................................................11.1 Definitions......................................................................................................................................11.1.1 SDIO Card...............................................................................................................................11.1.2 Embedded SDIO.....................................................................................................................11.2 SDIO Features...............................................................................................................................11.2.1 Common SDIO Features.........................................................................................................11.2.2 SDIO Card Features ...............................................................................................................11.2.3 Embedded SDIO Device Features..........................................................................................21.3 Document Structure.......................................................................................................................31.4 Standard SDIO Functions..............................................................................................................32. SDIO Signaling Definition ..................................................................................................42.1 SDIO Card Types ..........................................................................................................................42.2 SDIO Card Modes .........................................................................................................................42.2.1 SPI (Card mandatory support) ................................................................................................42.2.2 1-bit SD Data Transfer Mode (Card Mandatory Support)........................................................42.2.3 4-bit SD Data Transfer Mode (Mandatory for High-Speed Cards, Optional for Low-Speed)...42.3 SDIO Host Modes..........................................................................................................................42.4 Signal Pins.....................................................................................................................................52.4.1 Signal Pins for SDIO Card ......................................................................................................53. SDIO Card Initialization ......................................................................................................63.1 Initialization Sequence...................................................................................................................63.1.1 Initialization by Non-I/O Aware Host........................................................................................63.1.2 Initialization by I/O Aware Host ...............................................................................................73.2 The IO_SEND_OP_COND Command (CMD5)...........................................................................133.3 The IO_SEND_OP_COND Response (R4).................................................................................143.4 Special Initialization Considerations for Combo Cards................................................................153.4.1 Re-initialize Both I/O and Memory ........................................................................................153.4.2 Using a Combo Card as SDIO only or SD Memory only after Combo Initialization ..............153.4.3 Acceptable Commands after Initialization .............................................................................15iv

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association3.4.4 Recommendations for RCA after Reset ................................................................................153.4.5 Enabling CRC in SPI Combo Card .......................................................................................174. Differences with SD Memory Specification ....................................................................184.1 SDIO Command List....................................................................................................................184.2 Memory Commands and SDIO Commands ................................................................................184.2.1 Supported SD Memory Commands ......................................................................................184.2.2 Unsupported SD Memory Commands ..................................................................................184.3 Modified R6 Response ................................................................................................................194.4 Reset for SDIO ............................................................................................................................204.5 Bus Width ....................................................................................................................................204.6 Card Detect Resistor ...................................................................................................................204.7 Timings ........................................................................................................................................214.8 Data Transfer Block Sizes ...........................................................................................................214.9 Data Transfer Abort .....................................................................................................................214.9.1 Read Abort ............................................................................................................................214.9.2 Write Abort ............................................................................................................................214.10 Changes to SD Memory Fixed Registers ..................................................................................224.10.1 OCR Register......................................................................................................................224.10.2 CID Register........................................................................................................................224.10.3 CSD Register ......................................................................................................................224.10.4 RCA Register ......................................................................................................................224.10.5 DSR Register ......................................................................................................................224.10.6 SCR Register ......................................................................................................................234.10.7 SD Status ............................................................................................................................234.10.8 Card Status Register ...........................................................................................................235. New I/O Read/Write Commands.......................................................................................255.1 IO_RW_DIRECT Command (CMD52) ........................................................................................255.2 IO_RW_DIRECT Response (R5) ................................................................................................265.2.1 CMD52 Response (SD Modes).............................................................................................265.2.2 R5, IO_RW_DIRECT Response (SPI mode) ........................................................................275.3 IO_RW_EXTENDED Command (CMD53) ..................................................................................285.3.1 CMD53 Data Transfer Format...............................................................................................295.3.2 Special Timing for CMD53 Multi-Block Read ........................................................................29v

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association6. SDIO Card Internal Operation ..........................................................................................306.1 Overview......................................................................................................................................306.2 Register Access Time ..................................................................................................................306.3 Interrupts .....................................................................................................................................306.4 Suspend/Resume ........................................................................................................................316.5 Read Wait....................................................................................................................................316.6 CMD52 During Data Transfer ......................................................................................................316.7 SDIO Fixed Internal Map .............................................................................................................316.8 Common I/O Area (CIA) ..............................................................................................................326.9 Card Common Control Registers (CCCR)...................................................................................326.10 Function Basic Registers (FBR) ................................................................................................436.11 Card Information Structure (CIS) ...............................................................................................466.12 Multiple Function SDIO Cards ...................................................................................................466.13 Setting Block Size with CMD53 .................................................................................................466.14 Bus State Diagram.....................................................................................................................477. Embedded I/O Code Storage Area (CSA)........................................................................487.1 CSA Access .................................................................................................................................487.2 CSA Data Format ........................................................................................................................488. SDIO Interrupts .................................................................................................................498.1 Interrupt Timing............................................................................................................................498.1.1 SPI and SD 1-bit Mode Interrupts .........................................................................................498.1.2 SD 4-bit Mode .......................................................................................................................498.1.3 Interrupt Period Definition .....................................................................................................498.1.4 Interrupt Period at the Data Block Gap in 4-bit SD Mode (Optional).....................................498.1.5 End of Interrupt Cycles..........................................................................................................498.1.6 Terminated Data Transfer Interrupt Cycle .............................................................................508.1.7 Interrupt Clear Timing............................................................................................................508.2 Asynchronous Interrupt................................................................................................................509. SDIO Suspend/Resume Operation ..................................................................................5110. Timing to Pause SDIO Read Operation.........................................................................5210.1 Pause Read Operation by Stopping SDCLK .............................................................................52vi

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association10.2 Pause Read Operation by using Read Wait ..............................................................................5211. Power Control .................................................................................................................5311.1 Power Control Overview ............................................................................................................5311.2 Details of SDIO Power Control ..................................................................................................5311.2.1 Master Power Control..........................................................................................................5311.2.2 Power Selection ..................................................................................................................5411.2.3 Power State Control ............................................................................................................5411.2.4 High-Power Tuples ..............................................................................................................5411.2.5 The Maximum Card Power Restricted by Tc .......................................................................5511.3 Power Control Support for the SDIO Host .................................................................................5611.3.1 Version 1.10 Host ................................................................................................................5611.3.2 Version 3.00 Host ................................................................................................................5612. High-Speed Mode............................................................................................................5712.1 SDIO High-Speed Mode ............................................................................................................5712.2 Switching Bus Speed Mode in a Combo Card...........................................................................5713. SDIO Physical Properties...............................................................................................5813.1 SDIO Form Factors ...................................................................................................................5813.2 Full-Size SDIO...........................................................................................................................5813.3 miniSDIO ...................................................................................................................................5813.4 microSDIO .................................................................................................................................5814. SDIO Power .....................................................................................................................5914.1 SDIO Card Initialization Voltages ..............................................................................................5914.2 SDIO Power Consumption ........................................................................................................5915. Inrush Current Limiting ..................................................................................................6016. CIS Formats.....................................................................................................................6116.1 CIS Reference Document..........................................................................................................6116.2 Basic Tuple Format and Tuple Chain Structure .........................................................................6116.3 Byte Order Within Tuples...........................................................................................................6116.4 Tuple Version.............................................................................................................................62vii

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association16.5 SDIO Card Metaformat..............................................................................................................6216.6 CISTPL_MANFID: Manufacturer Identification String Tuple......................................................6316.7 SDIO Specific Extensions..........................................................................................................6316.7.1 CISTPL_FUNCID: Function Identification Tuple .................................................................6316.7.2 CISTPL_FUNCE: Function Extension Tuple.......................................................................6316.7.3 CISTPL_FUNCE Tuple for Function 0 (Extended Data 00h) ..............................................6416.7.4 CISTPL_FUNCE Tuple for Function 1-7 (Extended Data 01h) ...........................................6516.7.5 CISTPL_FUNCE Tuple for Function 1-7 (Extended Data 02h) ...........................................6816.7.6 CISTPL_SDIO_STD: Function is a Standard SDIO Function .............................................6916.7.7 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards .......................................................7017. Embedded SDIO..............................................................................................................7117.1 Relaxing SDIO Requirements for Embedded Device................................................................7117.1.1 Form Factor.........................................................................................................................7117.1.2 CIS Information ...................................................................................................................7117.1.3 8-Bit Bus Mode....................................................................................................................7117.2 Interface Signal for Embedded SDIO Device ............................................................................7117.3 Shared Bus Configuration .........................................................................................................71Appendix A (Normative) : Reference...................................................................................73A.1 Reference....................................................................................................................................73Appendix B (Normative) : Special Terms............................................................................74B.1 Terminology.................................................................................................................................74B.2 Abbreviations...............................................................................................................................74Appendix C (Normative) : Command List ...........................................................................76C.1 SD Mode Command List.............................................................................................................76C.2 SPI Mode Command List ............................................................................................................77Appendix D (Normative).......................................................................................................78viii

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationTable of TablesTable 3-1 : OCR Values for CMD5............................................................................................................... 13Table 4-1 : Supported SD Memory Commands ........................................................................................... 18Table 4-2 : Unsupported SD Memory Commands ....................................................................................... 19Table 4-3 : R6 response to CMD3 ............................................................................................................... 19Table 4-4 : SDIO R6 Status Bits .................................................................................................................. 19Table 4-5 : Combo Card 4-bit Control.......................................................................................................... 20Table 4-6 : Card Detect Resistor States....................................................................................................... 21Table 4-7 : SDIO Status Register Structure ................................................................................................. 24Table 5-1 : Flag Data for IO_RW_DIRECT SD Response ........................................................................... 27Table 5-2 : IO_RW_ EXTENDED command Op Code Definition................................................................. 28Table 5-3 : Byte Count Values ..................................................................................................................... 29Table 6-1 : Card Common Control Registers (CCCR) ................................................................................. 33Table 6-2 : CCCR bit Definitions.................................................................................................................. 42Table 6-3 : Function Basic Information Registers (FBR).............................................................................. 43Table 6-4 : FBR bit and field definitions ....................................................................................................... 45Table 6-5 : Card Information Structure (CIS) and reserved area of CIA ...................................................... 46Table 11-1 : Reference of Tuples Depends on Host Version ....................................................................... 55Table 16-1 : Basic Tuple Format.................................................................................................................. 61Table 16-2 : Tuples Supported by SDIO Cards............................................................................................ 62Table 16-3 : CISTPL_MANFID: Manufacturer Identification Tuple............................................................... 63Table 16-4 : CISTPL_FUNCID Tuple........................................................................................................... 63Table 16-5 : CISTPL_FUNCE Tuple General Structure ...............................................................................64Table 16-6 : TPLFID_FUNCTION Tuple for Function 0 (Common) ............................................................. 64Table 16-7 : TPLFID_FUNCTION Field Descriptions for Function 0 (common)........................................... 65Table 16-8 : TPLFID_FUNCTION Tuple for Function 1-7 (High Power Tuple)............................................. 66Table 16-9 : TPLFID_FUNCTION Field Descriptions for Functions 1-7....................................................... 68Table 16-10 : TPLFE_FUNCTION_INFO Definition..................................................................................... 68Table 16-11 : TPLFE_CSA_PROPERTY Definition .....................................................................................68Table 16-12 : TPLFID_FUNCTION Tuple for Function 1-7 (Power State Tuple).......................................... 68Table 16-13 : TPLFID_FUNCTION Field Descriptions for Functions 1-7 (Power State Tuple) .................... 69Table 16-14 : CISTPL_SDIO_STD: Tuple Reserved for SDIO Cards.......................................................... 69Table 16-15 : TPL_CODE CISTPL_SDIO_STD Definition........................................................................... 69Table 16-16 : CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards .......................................................... 70Table C- 1 : SD Mode Command List .......................................................................................................... 76Table C- 2 : SPI Mode Command List ......................................................................................................... 77ix

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationTable of FiguresFigure 1-1 : SDIO Related Specifications ...................................................................................................... 3Figure 2-1 : Signal connection to two 4-bit SDIO cards................................................................................. 5Figure 3-1 : SDIO Response to Non-I/O Aware Initialization ......................................................................... 6Figure 3-2 : Card Initialization Flow in SD mode (SDIO Aware Host) ............................................................ 9Figure 3-3 : Card initialization flow in SPI mode (SDIO aware host) ........................................................... 12Figure 3-4 : IO_SEND_OP_COND Command (CMD5)............................................................................... 13Figure 3-5 : Response R4 in SD mode....................................................................................................... 14Figure 3-6 : Response R4 in SPI mode....................................................................................................... 14Figure 3-7 : Modified R1 Response............................................................................................................. 14Figure 3-8 : Re-Initialization Flow for I/O Controller..................................................................................... 16Figure 3-9 : Re-Initialization Flow for Memory controller ............................................................................. 16Figure 5-1 : IO_RW_DIRECT Command..................................................................................................... 25Figure 5-2 : R5 IO_RW_DIRECT Response (SD Modes) ........................................................................... 26Figure 5-3 : IO_RW_DIRECT Response in SPI Mode................................................................................. 27Figure 5-4 : IO_RW_EXTENDED Command .............................................................................................. 28Figure 6-1 : SDIO Internal Map ................................................................................................................... 32Figure 6-2 : State Diagram for Bus State Machine ...................................................................................... 47Figure 8-1 : Continuous Interrupt Cycle....................................................................................................... 49Figure 17-1 : Embedded SDIO Interface ..................................................................................................... 71Figure 17-2 : Example Configuration Supporting Card Slot and Shared Bus .............................................. 72Figure 17-3 : Device Select Using Clock Signal .......................................................................................... 72x

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association1. General DescriptionThis Part E1 SDIO (SD Input/Output) Specification defines the SD bus interface specification for SDIOincluding register specification. Not only is the SDIO Card defined, but also the Embedded SDIO Device andCombo Card are defined. SDIO is based on the Physical Layer Specification and the SDIO Specificationprovides extension and modification of the Physical Layer Specification for SDIO card and device.1.1 Definitions1.1.1 SDIO CardThe SDIO (SD Input/Output) card is a removable product that utilizes the SD bus and SD commands. Thesame form factor as a memory card can be used and an extended form factor for SDIO card is defined by theSDIO Specification. (No extended form factor is defined for microSDIO in this version.)The SDIO Card shall comply with the Part E1 SDIO Specification and the Part 1 Physical Layer Specification(The SDIO Specification provides extension and modification of the Physical Layer specification for SDIO.The SDIO Specification takes precedence).The SDIO card shall have compatibility to the SD Memory Card regarding SD Bus pins layout, electrical,power and signaling. The SPI mode is mandatory in the SDIO Cards but not all features may be available inSPI mode.1.1.2 Embedded SDIOAn Embedded SDIO Device is a product that utilizes the SD bus and SD commands."Embedded" is defined as a permanently soldered on a PCB (Printed Circuit Board) non-removable deviceor mounted through a socket permanently soldered on a PCB such that the Embedded SDIO Device can't beremoved by end users.The Embedded SDIO Device shall comply with the Part E1 SDIO Specification and the Part 1 Physical LayerSpecification. (The SDIO Specification provides extension and modification of the Physical Layerspecification for SDIO card and device. The SDIO Specification takes precedence.) When standard interfacespecification (for example, host interface voltage and timing) is required, SDIO card and device should followthe Part 1 eSD Addendum.The Embedded SDIO Device may be any form factor and any pin layout. The SPI mode is optional in theEmbedded SDIO Devices. Not all features may be available in SPI mode.1.2 SDIO Features1.2.1 Common SDIO Features• Targeted for portable and stationary applications• Minimal or no modification to the SD Physical bus is required• Minimal change to the memory initialization sequence.• Multi-function support including multiple I/O and combined I/O and memory• Up to 7 I/O functions plus one memory function is supported on one card.• An interrupt is supported to request the host to service to an event• Standard Application Specifications for Standard SDIO Functions can be defined by Part Ex• Card information is provided by Tuples.1.2.2 SDIO Card Features• Supply Voltage range: 2.7-3.6V (Operational Voltage is used for Initialization)• Removable and Plug and play (PnP) support• Multiple Form Factors:1

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association• Standard-Size SDIO (Extended form factor can be used)• miniSDIO (Extended form factor can be used)• microSDIO• A card per slot connection1.2.3 Embedded SDIO Device Features• Supply Voltage range: 2.7-3.6V or 1.7-1.95V.• Non removable device.• Any form factor and any pin layout• Shared Bus connection is possible2

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association1.3 Document StructureReference documents are described in the Appendix A.SDIO Specification describes modifications of the Physical Layer Specification and new functions for SDIO.The standard card form factors are defined in the Part 1 Mechanical Addenda. The extended card formfactors for Standard-Size SDIO card are defined in the SDIO Specification.This specification refers any released versions of the Physical Layer Specification Version 3.00 and later andthe eSD Addendum Version 2.10 and later.1.4 Standard SDIO FunctionsFigure 1-1 shows the SDIO related specifications. The SDIO bus specification is defined by the PhysicalLayer specification and this SDIO specification. The Memory portion of a Combo card is specified by thePhysical Layer specification. An SDIO and a Combo Card have an SDIO function on the backend.Associated with the base SDIO specification, there are several Application Specifications for Standard SDIOFunctions. The feature of SDIO is determined by a SDIO function. Card driver and application software arerequired to control the function. There are two SDIO function types: standard SDIO function and nonstandard SDIO function.The standard functions such as cameras, Bluetooth cards and GPS receivers have a standard registerinterface, a common operation method and a standard CIS extension. By defining a standard registerinterface for a specific function, an OS vendor can provide a standard card driver, application software andAPI for the functions. Full information on the standard functions is defined by Part E2 to Part E6.In the case of non standard SDIO functions, a card or device manufacturer needs to provide a card driver.The user may need to install the card driver and the application software to use the non standard SDIOfunction. Implementation of the non standard register interfaces is optional for any card vendor, butcompliance with the standard allows the use of standard drivers and applications.Part 1 Physical Layer SpecificationPart E1 SDIO SpecificationSDIO CardCombo CardMemoryFunctionFunctionBackend FunctionsApplication Specifications for Standard SDIO FunctionsPart E2 & E3BluetoothSpecificationPart E4GPSSpecificationPart E5CameraSpecificationPart E6PHSSpecificationFigure 1-1 : SDIO Related SpecificationsIn the following Chapters and Sections, the term "card" needs to be interpreted as not only "SDIO Card andCombo Card" but also "Embedded SDIO Device" unless otherwise noted.3

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association2. SDIO Signaling Definition2.1 SDIO Card TypesThis specification defines two types of SDIO cards. The Full-Speed card supports SPI, 1-bit SD and the 4-bitSD transfer modes at the full clock range of 0-25MHz. Full-Speed SDIO cards have a data transfer rate ofover 100 Mb/second (10 MB/Sec). The second version of the SDIO card is the Low-Speed SDIO card. Thiscard requires only the SPI and 1-bit SD transfer modes. 4-bit support is optional. In addition, Low-SpeedSDIO cards shall support a full clock range of 0-400 KHz. The intended use of Low-Speed cards is to supportlow-speed I/O capabilities with a minimum of hardware. The Low-Speed cards support such functions asmodems, bar-code scanners, GPS receivers etc. If a card is a 'Combo card' (memory plus SDIO) thenFull-Speed and 4-bit operation is mandatory for both the memory and SDIO portions of the card.2.2 SDIO Card ModesThere are three bus modes defined for SD memory cards that also apply to SDIO Cards:2.2.1 SPI (Card mandatory support)The SPI bus topology is defined in Section 3.5.2 and the protocol is defined in Sections 3.6.2 and Chapter 7of the Physical Layer Specification Version 3.0x. In this mode pin 8, which is undefined for memory, is usedas the interrupt pin. All other pins and signaling protocols are identical to the Physical Layer Specification.New functions defined after the SDIO Version 2.00 may not be supported in the SPI mode.2.2.2 1-bit SD Data Transfer Mode (Card Mandatory Support)This mode is identical to the 1 data bit (narrow) mode defined for SD Memory in Section 3.6.1 of the PhysicalLayer Specification. In this mode, data is transferred on the DAT[0] pin only. In this mode pin 8, which isundefined for memory, is used as the interrupt pin and pin 9, which is undefined for memory, is used as theread wait pin. All other pins and signaling protocols are identical to the Physical Layer Specification.2.2.3 4-bit SD Data Transfer Mode (Mandatory for High-Speed Cards, Optional forLow-Speed)This mode is identical to the 4 data bit mode (wide) defined for SD Memory in Section 3.6.1 of the PhysicalLayer Specification. In this mode, data is transferred on all 4 data pins (DAT[3:0]). In this mode the interruptpin is not available for exclusive use as it is utilized as a data transfer line. Thus, if the interrupt function isrequired, special timing is required to provide interrupts. Refer to Section 8.1.2 for details of this operation.UHS-I bus speed mode has been added from SDIO Version 3.00 onward. The 4-bit SD mode provides thehighest data transfer possible, up to 104 MB/sec.2.3 SDIO Host ModesIf a SDIO aware host supports the SD transfer mode, it is recommended that both the 1-bit and 4-bit modesbe supported. While an SDIO host that supports only the 4-bit transfer mode is possible, its performance witha Low-Speed SDIO card may be reduced. This is because the only means to transfer data to and from aLow-Speed card would be the single byte per command transfer (using the IO_RW_DIRECT command(CMD52), refer to Section 5.1).4

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association3. SDIO Card Initialization3.1 Initialization Sequence3.1.1 Initialization by Non-I/O Aware HostA requirement for the SDIO specification is that an SDIO card shall not cause non-I/O aware hosts to failwhen inserted. In order to prevent operation of I/O functions in non-I/O aware hosts, a change to the SD cardidentification mode flowchart is needed. A new command (IO_SEND_OP_COND, CMD5) is added toreplace the ACMD41 for SDIO initialization by I/O aware hosts (Refer to Section 3.2).After reset or power-up, all I/O functions on the card are disabled and the I/O portion of the card shall notexecute any operation except CMD5 or CMD0 with CS=low. If there is SD memory on the card (also called acombo card), that memory shall respond normally to all mandatory memory commands.An I/O only card shall not respond to the ACMD41 command. The host shall then give up and disable thiscard. Thus, the non-aware host receives no response from an I/O only card and forces it to the inactive state.The operation of an I/O card with a non-I/O aware host is shown in Figure 3-1 Note that the solid lines are theactual paths taken while the dashed lines are not executed.ResetSPI Mode IdleStateCMD0 + CSasserted (0)SPIIdle StateCMD58(optional)InvalidCmdSDACMD41(arg = 00)NoResponseBusyCMD1 orACMD41InvalidCmdSDIO card isRejectedResponseBusySDIO card isRejectedNormal SPImemory operationInactive StateNoResponseACMD41arg = workingvoltageResponseNormal SDmemory operationFigure 3-1 : SDIO Response to Non-I/O Aware Initialization6

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association3.1.2 Initialization by I/O Aware HostAn SDIO aware host sends CMD5 prior to the CMD55/ACMD41 pair, and thus would receive a valid OCR inthe R4 response to CMD5 and continue to initialize the card. Figure 3-2 shows the operation of an SDIOaware host operating in the SD modes and Figure 3-3 shows the same operation for a host that operates inthe SPI mode.If the I/O portion of a card has received no CMD5, the I/O Section remains inactive and shall not respond toany command except CMD5. A combo card stays in the memory-only mode. If no memory is included on thecard, the card would not respond to any memory command. If the I/O aware host sends a CMD5 to the card,the card responds with R4. The host then reads that R4 value and knows the number of available I/Ofunctions and if any SD memory exists.A host that supports UHS-I sets S18R to 1 in the argument of CMD5 to request a change of the signal voltageto 1.8V. If the card supports UHS-I and the current signal voltage is 3.3V, S18A is set to 1 in the R4 response.If the signal voltage is already 1.8V, the card sets S18A to 0 so that host maintains the current signal voltage.UHS-I is supported in SD mode and S18A is always 0 in SPI mode.After the host has initialized the I/O portion of the card, it then reads the Common Information Area (CIA) ofthe card (Refer to Section 6.8). This is done by issuing a read command, starting with the byte at address00h, of I/O function 0. The CIA contains the Card Common Control Registers (CCCR) and the FunctionBasic Registers (FBR). Also included in the CIA are pointers to the card's common Card InformationStructure (CIS) and each individual function's CIS. The CIS structure is defined in Chapter 16. The CISincludes information on power, function, manufacturer and other things the host needs to determine if the I/Ofunction(s) is appropriate to power-up. If the host determines that the card should be activated, a register inthe CCCR area enables the card and each individual function. At this time, all functions of the I/O card arefully available. In addition, the host can control the power consumption and enable/disable interrupts on afunction-by-function basis. This access to I/O does not interfere with memory access to the card if present.Figure 3-2 shows Card Initialization Flow in SD mode and Figure 3-3 shows Card Initialization Flow in SPImode. UHS-I is not supported in SPI mode. Initialization Flow for an embedded device can be simplified byremoving unnecessary checks.When receiving CMD5 with arg=0, the SDIO card returns an R4 response but does not start initialization ofthe I/O function. The Version 3.00 SDIO card should start initialization sequence by receiving CMD5 withoutwaiting for CMD5 with WV=0.Combo Cards can accept CMD15 with RCA=0000, as described in the Physical Layer Specification, butthere is an exception for SD memory only cards. Memory only cards require a non-zero RCA before the hostmay issue CMD15. Thus, CMD15 shall be issued after CMD3 in the Standby state. In the case of ACMD41,it shall accept RCA=0000h.Application Notes:As shown in Figure 3-2 and Figure 3-3, an SDIO aware host should send CMD5 arg=0 as part of theinitialization sequence after either Power On or a CMD 52 with write to I/O Reset. CMD5 arg=0 isrequired for using a removal card due to the following reasons:(1) There was 3.1V-3.5V voltage range legacy card and then whether host power supply can providethe voltage in this range should be checked.(2) There may be the card which requires CMD5 with WV= 0 to initialize the card.CMD5 arg=0 may not be necessary for embedded system if the device does not require it.7

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationRe-init MemoryPower OnRe-init IOMEM=0, F2=0IO=0, MEM=0, F2=0IO=0CMD0 Pin1=HighCMD52 IO ResetNo ResponseCMD8Check ResponseCMD8 is required to supportSDHC or SDXCError ResponseGood ResponseF8=0 F8=1Unusable cardNot Use IO or IO=1Initialize SDIO?Use IO & IO=0CMD5 Arg=0Get IO OCRNo ResponseNF=0 or OCR invalidCheck ResponseNF>0 & OCR validCMD5 Arg=S18R,WVS18R=1: UHS-I Host1sec TimeoutUnusable card(Inactive State)IORDY=0Check ResponseIORDY=1IO=1 IO Initialized (Check S18A later)Test MP FlagMP=0CMD5 No Response or MP=1Use Memory & MEM=0Not Use Memory or MEM=1Initialize Memory?AMemory InitializationBSkip Memory Initialization8

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationABHCS=1: SDHC or SDXC HostACMD41 Arg=S18R,HCS, WV S18R=1: UHS-I HostMRDY=0Unusable card(Inactive State)S18A(OR) is logical OR ofS18A in CMD5 and ACMD411sec TimeoutCheck ResponseMRDY=1MEM=1 ACMD41 CompletionIO=1S18A=0Check S18A(OR)S18A=1CMD11Check IOIO=0Response ErrorCheck ResponseNo ErrorVoltage Switch SequenceErrorCheck ErrorNo ErrorPower CycleCheck MEM, F2MEM=1 & F2=0CMD2MEM=0 or F2=1CMD2 CompletionF2=1MEM=1Check MEMCMD3MEM=0IO=0, MEM=1Check IO, MEMIO=1, MEM=1IO=1,MEM=0Check CCSIO OnlyCheck CCSCardCCS=0 CCS=1 CCS=0 CCS=1CMD15 RCA=0Unusable card(Inactive State)SDSCMemoryOnly CardSDHC or SDXCMemoryOnly CardSDSCComboCardSDHC or SDXCComboCardFigure 3-2 : Card Initialization Flow in SD mode (SDIO Aware Host)9

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationVariablesNF: Number of I/O Functions (CMD5 Response)MP: Memory Present Flag (CMD5 Response)IORDY: I/O Power-up Status (C bit in the CMD5 response)MRDY: Memory Power-up Status (OCR Bit31)HCS: Host Capacity Support (ACMD41 Argument)CCS: Card Capacity Status (ACMD41 Response)S18R: Switching to 1.8V RequestS18A: Switching to 1.8V AcceptedFlagsIO: I/O Functions Initialized FlagMEM: Memory Initialized FlagF8: CMD8 FlagF2: CMD2 FlagSpecial TermWV: Working Voltage range of OCR10

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationRe-init MemoryPower OnRe-init IOMEM=0IO=0, MEM=0IO=0CMD0 CS=LowCMD52 IO ResetNo ResponseCMD8Check ResponseCMD8 is required to supportSDHC or SDXCError ResponseGood ResponseF8=0 F8=1Unusable cardNot Use IO or IO=1Initialize SDIO?Use IO & IO=0CMD5 Arg=0Get IO OCRNo ResponseNF=0 or OCR invalidCheck ResponseNF>0 & OCR validCMD5 Arg=WV1sec TimeoutUnusable card(Inactive State)IORDY=0Check ResponseIORDY=1IO=1 IO InitializedTest MP FlagMP=0CMD5 No Response or MP=1Use Memory & MEM=0Not Use Memory or MEM=1Initialize Memory?CMemory InitializationDSkip Memory Initialization11

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationCDACMD41 Arg=HCS, WVHCS=1: SDHC or SDXC HostIDLE=1Check ResponseIDLE=0Illegal Commandor 1sec TimeoutMEM=1CMD58Memory InitializedCheck IO, MEMIO=1 or MEM=1IO=0, MEM=0Check IO, MEMIO=0 and MEM=0IO=0, MEM=1IO=1, MEM=1IO=1,MEM=0Check CCSIO OnlyCheck CCSCardCCS=0 CCS=1 CCS=0 CCS=1Unusable cardSDSCMemoryOnly CardSDHC or SDXCMemoryOnly CardSDSCComboCardSDHC or SDXCComboCardFigure 3-3 : Card initialization flow in SPI mode (SDIO aware host)VariablesNF: Number of I/O Functions (CMD5 Response)MP: Memory Present Flag (CMD5 Response)IORDY: I/O Power-up Status (C bit in the CMD5 response)IDLE: Memory Power-up Status (ACMD41 R1 Response)HCS: Host Capacity Support (ACMD41 Argument)CCS: Card Capacity Status (ACMD41 Response)FlagsIO: I/O Functions Initialized FlagMEM: Memory Initialized Flag=0: Memory Not Initialized=1: Memory InitializedF8: CMD8 FlagSpecial TermWV: Working Voltage range of OCR12

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association3.2 The IO_SEND_OP_COND Command (CMD5)Figure 3-4 : shows the format of the IO_SEND_OP_COND command (CMD5). The function of CMD5 forSDIO cards is similar to the operation of ACMD41 for SD memory cards. It is used to inquire about thevoltage range needed by the I/O card. The normal response to CMD5 is R4 in either SD or SPI format. TheR4 response in SD mode is shown in Figure 3-5 and the SPI version is shown in Figure 3-6.S D Command Index Stuff Bits S18R I/O OCR CRC7 E000101b1 1 6 7 1 24 7 1Figure 3-4 : IO_SEND_OP_COND Command (CMD5)The IO_SEND_OP_COND Command contains the following fields:S(tart bit): Start bit. Always 0D(irection):Direction. Always1 indicates transfer from host to card.Command Index: Identifies the CMD5 command with a value of 000101bStuff Bits: Not used, shall be set to 0.S18R:Switching to 1.8V RequestI/O OCR:Operation Conditions Register. The supported minimum and maximum valuesfor VDD. The layout of the OCR is shown in Table 3-1. Refer to Section 4.10.1 foradditional information.CRC7:7 bits of CRC dataE(nd bit): End bit, always 1I/O OCR bit VDD Voltage Windowposition(in Volts)0-3 Reserved4 Reserved5 Reserved6 Reserved7 Reserved8 2.0-2.19 2.1-2.210 2.2-2.311 2.3-2.412 2.4-2.513 2.5-2.614 2.6-2.715 2.7-2.816 2.8-2.917 2.9-3.018 3.0-3.119 3.1-3.220 3.2-3.321 3.3-3.422 3.4-3.523 3.5-3.6Table 3-1 : OCR Values for CMD5The SDIO Version 2.00 cards shall support the operational voltage range 2.7-3.6V and are not necessary tosupport the voltage range 2.0-2.7V for basic communication. The hosts, which support SDIO Version 2.00,shall not use voltage range 2.0-2.7V for basic communication.13

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association3.3 The IO_SEND_OP_COND Response (R4)An SDIO card receiving CMD5 shall respond with a SDIO unique response, R4. The format of R4 for boththe SD and SPI modes is:S D Reserved C Numberof I/OfunctionsMemoryPresentStuffBitsS18A I/O OCR Reserved E1 1 6 1 3 1 2 1 24 7 1Figure 3-5 : Response R4 in SD modeModifiedR1CNumberof I/OfunctionsMemoryPresentStuff BitsI/O OCR8 1 3 1 3 24Figure 3-6 : Response R4 in SPI modeThe Response, R4 contains the following data:S(tart bit): Start bit. Always 0D(irection):Direction. Always 0. Indicates transfer from card to host.Reserved: Bits reserved for future use. These bits shall be set to 1.C: Set to 1 if Card is ready to operate after initializationNumber of I/O Functions: Indicates the total number of I/O functions supported by this card. The range is0-7. Note that the common area present on all I/O cards at Function 0 is notincluded in this count. The I/O functions shall be implemented sequentiallybeginning at function 1.Memory Present: Set to 1 if the card also contains SD memory. Set to 0 if the card is I/O only.S18A:Switching to 1.8V Accepted (Supported in SD mode only)I/O OCR:Operation Conditions Register. The supported minimum and maximumvalues for VDD. The layout of the OCR is shown in Table 3-1. Refer to Section4.10.1 for additional information.Modified R1:The SPI R1 response byte as described in the Physical Layer Specificationmodified for I/O as described in Figure 3-7.Stuff Bits Not used, shall be set to 0.0 001 = in idle stateRFU (always 0)1 = illegal command1 = COM CRC error1 = Function number errorRFU (always 0)1 = parameter errorStart Bit (always 0)Figure 3-7 : Modified R1 ResponseOnce an SDIO card has received a CMD5, the I/O portion of that card is enabled to respond normally to allfurther commands. This I/O enable of the functions within the I/O card shall remain set until a reset, power14

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Associationcycle or CMD52 with write to I/O reset is received by the card. Note that a SD memory only card mayrespond to a CMD5. The proper response for a memory only card would be Memory Present = 1 andNumber of I/O Functions = 0. SD memory card detects the CMD5 as an illegal command and not respond.Note that unlike the similar memory command ACMD41, The SPI response to CMD5 does contain the OCRvalue from the card.An I/O aware host will send a CMD5. If the card responds with a response R4 within the timeout value of Ncras defined in the Physical Layer Specification, the host determines the card's configuration based on thedata contained within the R4.3.4 Special Initialization Considerations for Combo CardsThe host shall be aware of some special situations when initializing a Combo card (SDIO plus SD Memoryon the same card). This is because an implementation of the Combo card could actually use two separatecontrollers (Memory and I/O) in the same package and sharing the same bus lines. It is important for the hostto both detect and properly configure both parts (controllers) of a Combo card in order to prevent conflictsbetween the SDIO and the SD memory controller. These concerns are due to the different responses to areset (hard or soft) by the two controllers. Another issue is the value of the RCA (Relative Card Address) thatexists within the Memory controller.Note that this consideration is for SD 1-bit and SD 4-bit modes only. In SPI mode, card select/de-select isaccomplished using the hardware CS line rather than the RCA.3.4.1 Re-initialize Both I/O and MemoryWhen the host re-initializes both the I/O and Memory controllers, it is strongly recommended that the hosteither execute a power reset (power off then on) or issues reset commands to both controllers prior to anyother operation. If the host chooses to use the reset commands, it shall issue CMD52 (I/O Reset) first,because it cannot issue CMD52 after CMD0 (Refer to Section 4.4). After the reset, the host shall re-initializeboth the I/O and Memory controller as defined in Figure 3-2.3.4.2 Using a Combo Card as SDIO only or SD Memory only after Combo InitializationIf a host intends to use only the SDIO or the Memory portion of a Combo Card, it is strongly recommendedthat the host power reset (power off then on) or issues reset commands to both controllers prior to any otheroperation. If the host chooses to use the reset commands, it shall issue CMD52 (I/O Reset) first, because itcannot issue CMD52 after CMD0 (Refer to Section 4.4). After the resets, the host re-initializes either the I/Oand Memory controller as defined in Figure 3-2.3.4.3 Acceptable Commands after InitializationWhen the host re-initializes a Combo card, the acceptable commands that the host can issue are restricteduntil the I/O controller is placed into the command state and memory controller enters the transfer state. Theprohibited commands are identified in the next section. Combo cards may not work correctly when the hostissues these prohibited commands. The proper command sequence for the I/O controller and the memorycontroller are shown in the following sections. Note that CMD15 (GO_INACTIVE_STATE) can be sent at anytime after initialization in order to put any addressed memory controller into the inactive state.3.4.4 Recommendations for RCA after ResetThe RCA specification was not fully defined in the SDIO Specification Ver1.00. There are two types of cards(SDIO or Combo) with different responses to CMD0 or SDIO reset. The possible responses are:The card clears RCA to 0000hThe card keeps current RCA value15

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationCommand SequenceCombo Init(After CMD7 with the correct RCA)Card RCA Select/Deselect Mem State I/O StateRCA1 Select tran cmdIssue CMD52 (Reset I/O)RCA1xxxxSelDeseltran cmd idleRe-initialize I/O (CMD5)xxxxDeselecttranidleIssue CMD3xxxxRCA2DeselecttranidlestbyIssue CMD7 with the correct RCA(and Data Transfer)RCA2Desel Sel transtbycmdFigure 3-8 : Re-Initialization Flow for I/O ControllerFigure 3-8 : shows the re-initialization flow for the I/O controller of a Combo card. The flow of commands onthe left side is matched with the RCA and controller states on the right side. The RCA value of xxxx denotesan RCA value of either 0000h or the prior RCA value. For new controller designs, a reset RCA value of 0000his recommended. The host shall not issue any commands to the Combo Card except for CMD0, CMD5,CMD3 or CMD7 until the I/O controller has transitioned to the cmd state.Command Sequence Card RCA Select/Deselect Mem State I/O StateCombo Init(After CMD7 with the correct RCA)RCA1 Select tran cmdIssue CMD0 (Reset Memory)RCA1xxxxhSelDeseltranidlecmdRe-initialize Memory (ACMD41)xxxxhDeselectidlereadycmdIssue CMD2xxxxhDeselectreadyidentcmdIssue CMD3)xxxxhRCA2DeselectidentstbycmdIssue CMD7 with the correct RCA(and Data Transfer)RCA2 Desel SelstbytrancmdFigure 3-9 : Re-Initialization Flow for Memory controllerFigure 3-9 shows the equivalent command flow to re-initialize the memory controller of a Combo card. TheRCA value of xxxxh denotes an RCA value of either 0000h or the prior RCA value. For new controllerdesigns, a reset value of 0000h is recommended. An important fact for the host designer to note is that thehost shall not issue any commands except for CMD0, ACMD41 (with RCA=0000h), CMD2, CMD3 or CMD7to the Combo Card until the memory controller has transitioned to the tran state.16

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association4. Differences with SD Memory Specification4.1 SDIO Command ListTable C- 1 shows the list of commands accepted by SD memory and SDIO cards when using the SD businterface. Table C- 2 shows the list of commands accepted by SD memory and SDIO cards when using theSPI bus interface.4.2 Memory Commands and SDIO Commands4.2.1 Supported SD Memory CommandsSD Memory SDIOCommentCommand CommandCMD0 CMD0 The first CMD0 is used to select either SD mode or SPI mode. IfCMD0 is not received, SDIO Card shall be started in SD mode.CMD11 CMD11 This is a common command between the memory and SDIO. Asignal voltage switch sequence is started by this command toenter UHS-I mode.CMD19 CMD19 This is a common command between memory and SDIO. Thiscommand is effective in 1.8V signaling level, otherwise it istreated as an illegal command. The tuning block is sent to thehost so that host can control a suitable sampling position.Refer to the Physical Layer Specification Version 3.0x regarding CMD11 and CMD19 functions.Table 4-1 : Supported SD Memory Commands4.2.2 Unsupported SD Memory CommandsSeveral commands required for SD Memory cards are not supported by either SDIO-only cards or the I/Oportion of Combo cards. Some of these commands have no use in SDIO cards such as Erase commandsand thus are not supported in SDIO. In addition, there are several commands for SD memory cards thathave different commands when used with the SDIO section of a card. Table 4-2 lists these SD Memorycommands and the equivalent SDIO commands. For a complete list of supported and unsupportedcommands, refer to Table C- 1 and Table C- 2.SD MemoryCommandCMD0CMD12CMD16SDIOCommandCMD52 (writeto I/O reset inCCCR)CMD52 (writeto I/O abort)CMD52 (writeto I/O BlockLength)CommentThe reset command (CMD0) is only used for memory or thememory portion of Combo cards. An I/O only card or the I/O portionof a combo card is not reset with CMD0 but reset with I/O Reset(by writing 1 to the RES bit (bit 3 of address 6 in the CCCR) byCMD52). I/O Reset is invoked after the response of CMD52.In order to abort a block transfer of data, SD memory cards useCMD12. In order to abort an I/O transaction, use CMD52 to write tothe abort register in the CCCR (bits 2:0 of register 6). Refer toSection 4.8 for details.CMD16 sets the block length for SD memory. In order to set theblock length for each I/O function, use CMD52 to write the blocklength in the FBRCMD2 NONE The CID register does not exist in an SDIO only cardCMD4 NONE The DSR register does not exist in an SDIO only cardCMD9 NONE The CSD register does not exist in an SDIO only cardCMD10 NONE The CID register does not exist in an SDIO only card18

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationSD Memory SDIOCommentCommand CommandCMD13 NONE An SDIO only card or the I/O portion of a combo card does notsupport the same SEND_STATUS (CMD13) protocol the SDmemory uses. Refer to Section 4.10.8.ACMD6 CMD52 (writeto Bus_WidthSET_BUS_WIDTH is handled by a write to the CCCR. Refer toSection 4.4 for details.[1:0] in CCCR)ACMD13 NONE The SD Status register does not exist in an SDIO only cardACMD41 CMD5 SDIO cards and hosts use the IO_SEND_OP_COND Command(CMD5). Refer to Section 3.2ACMD42 CMD52 In the SD mode, the pull-up resistor on DAT[3] is controlled bywriting to the CD Disable bit in the CCCR. For Combo Cards, thisresistor is enabled unless both the memory and the I/O controlregisters are set to disable the resistor. Refer to Section 4.6 for details.ACMD51 NONE The SCR register does not exist in an SDIO only cardCMD17,CMD18,CMD53 I/O block operations use CMD53, rather than memory blockread/write commands.CMD24,CMD25Table 4-2 : Unsupported SD Memory Commands4.3 Modified R6 ResponseThe normal response to CMD3 by a memory card is R6 as shown in Table 4-3 :. The card status bits (23-8)are changed when CMD3 is sent to an I/O only card. In this case, the 16 bits of response shall be theSDIO-only values shown in Table 4-4Bit position 47 46 [45:40] [39:8] Argument field [7:1] 0Width (bits) 1 1 6 16 16 7 1Value '0' '0' X X X X '1'DescriptionStartbitDirectionbitCommand New published RCAindex [31:16] of the card('000011')Table 4-3 : R6 response to CMD3[15:0] Card status(Refer to Table 4-4)CRC7endbitBits Identifier Type Value Description ClearCondition15 COM_CRC_ERROR E R '0'= no error The CRC check of the previous B'1'= error command failed14 ILLEGAL_COMMAND E R '0'= no error Command not legal for the card B'1'= error state13 ERROR E R X '0'= no error A general or an unknown error C'1'= error occurred during the operation12: 0 Undefined. Should read as 0 for SDIO only cards. Host should ignore these bits.Note: Please refer to Section 7.3.4 of the Physical Layer Specification for explanation of the entries in theType and Clear Condition columns.Table 4-4 : SDIO R6 Status Bits19

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association4.4 Reset for SDIOIn order to reset all functions within an SDIO card or the SDIO portion of a combo card, a method differentthan that used for SD memory is defined. The reset command (CMD0) is only used for memory or thememory portion of Combo cards. In order to reset an I/O only card or the I/O portion of a combo card, useCMD52 to write a 1 to the RES bit in the CCCR (bit 3 of register 6). Note that in the SD mode, CMD0 is onlyused to indicate entry into SPI mode and shall be supported. An I/O only card or the I/O portion of a combocard is not reset by CMD0.4.5 Bus WidthFor an SD memory card, the bus width for SD mode is set using ACMD6. For an SDIO card a write to theCCCR using CMD52 is used to select bus width. In the case of a combo card, both selection methods exist.In this case, the host shall set the bus width in both locations by issuing both the ACMD6 and the CCCR writeusing CMD52 with the same width before starting any data transfers. For details on changing the bus for anSDIO card, refer to Table 6-2. For a Combo Card, changing bus width is handled as shown in Table 4-5.I/O Memory Control MethodInitialized NotCCCRInitializedNot Initialized ACMD6InitializedInitialized Initialized CCCR & ACMD6Table 4-5 : Combo Card 4-bit ControlAs shown in Table 4-5, if only the I/O function of a combo card is active, writing to the CCCR is all that isrequired to change the bus width mode. If only memory is active then ACMD6 is all that is needed to changebus widths. If both I/O and Memory are active then both CCCR and ACMD6 are needed to change the buswidth. In the combo card, both the memory and I/O controllers shall be set to the same bus widthNote that Low-Speed SDIO cards support 4-bit transfer as an option. When communicating with aLow-Speed SDIO card, the host shall first determine if the card supports 4-bit transfer prior to attempting toselect that mode.If a Combo card supports the lock/unlock operation, it cannot change bus width of a locked card and returnsan illegal command error to a bus width switch command. The host needs to unlock the card by CMD42before changing bus width. This also implies that the host should not change bus width during initializationbefore managing a locked card.Only 4-bit bus mode is supported in UHS-I except CMD42 (As unlocking is required before changing 4-bitmode, CMD42 sends a data block in 1-bit mode). UHS-I operating in 1-bit mode is not assured.4.6 Card Detect ResistorSD memory and I/O cards use a pull-up resistor on DAT[3] to detect card insertion. The procedure toenable/disable this resistor is different between SD memory and SDIO. SD memory uses ACMD42 to controlthis resistor while SDIO uses writes to the CCCR using CMD52. In the case of a combo card, both controllocations exist and shall be managed by the host. For a combo card, the resistor is enabled only when boththe memory and the I/O control registers have the resistor enabled. That is, after a power on, the host shalldisable the resistor by sending ACMD42 to the memory controller or a CCCR write to the SDIO controllersince the resistor enable is a logical AND of the two enables. Table 4-6 shows the effect of each resistorenable on the card's resistor. After power-up, both locations default to resistor enabled. Note that after an I/Oreset, the I/O resistor enable is not changed. Also note that SDIO Specification Version 1.00 required thatboth the SDIO and Memory resistor be disabled in order for the resistor to actually be disabled (logical OR of20

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Associationthe 2 enables). Combo cards built to that specification require the host to disable both enables. It isrecommended the host disable both enables of any combo card to avoid problems with the differencebetween 1.0 and current specification based cards.I/O Resistor Memory Resistor Card ResistorEnabled Enabled Resistor ConnectedEnabled Disabled Resistor DisconnectedDisabled Enabled Resistor DisconnectedDisabled Disabled Resistor DisconnectedTable 4-6 : Card Detect Resistor States4.7 TimingsThis section is not included in the Simplified Specification.4.8 Data Transfer Block SizesSDIO cards may transfer data in either a multi-byte (1 to 512 bytes) or an optional block format, while the SDmemory cards are fixed in the block transfer mode. The Physical Layer Specification limits the block size fordata transfer to powers of 2 (i.e. 512, 1024, 2048) unless using partial read and write. The SDIOSpecification allows any block size from 1 byte to 2048 bytes in order to accommodate the various naturalblock sizes for I/O functions. Note that an SDIO card function may define a maximum block size or bytecount in the CIS that is smaller than the maximum values described above.4.9 Data Transfer AbortA host communicating with a SD memory card uses CMD12 to abort the transfer of read or write data to/fromthe card. For an SDIO card, CMD12 abort is replaced by a write to the ASx bits in the CCCR. Normally, theabort is used to stop an infinite block transfer (block count=0). If an exact number of blocks are to betransferred, it is recommended that the host issue a block command with the correct block count, rather thanusing an infinite count and aborting the data at the correct time.4.9.1 Read AbortThe host may issue an I/O abort by writing to the CCCR at any time during I/O extended read operation. Thedata transmission stops 2 clocks cycles after the end bit of the I/O abort command, even if the card hasalready begun transferring an unwanted data block while the host is issuing the abort.The rest of this section is not included in the Simplified Specification.4.9.2 Write AbortThe host may issue an I/O abort by writing to the CCCR at any time between data blocks during I/O extendedwrite operation. In this case, the final block transfer (including the CRC response from the card) shall becompleted. This requires that the end bit of the I/O abort command appear a maximum of two clocks beforethe end bit of the CRC response to the last data block. Note that the I/O abort command may be sent anytime after the CRC response to the last data block. The host shall not abort in the middle of a write block.After the I/O abort is sent to the card, the card signals 'Busy' (by pulling DAT[0] line to '0') until it has finishedprocessing the last transferred data block. During that Busy period, the host may release the bus by writingto the CCCR BR bit. There exist some special cases when the abort is issued near the end of the CRCresponse to a write multiple-block command.The rest of this section is not included in the Simplified Specification.21

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association4.10 Changes to SD Memory Fixed RegistersThe Physical Layer Specification defines 7 fixed card registers. They are:1. OCR Register (32 bits)2. CID Register (128 bits)3. CSD Register (128 bits)4. RCA Register (16 bits)5. DSR Register (16 bits, optional)6. SCR Register (64 bits)7. SD_CARD_STATUS (512 bits)In addition, within an SD memory card there is a status register whose value is returned to the host in theform of several responses (i.e. the R1b response). An SDIO only card eliminates some registers andchanges some of the bits in the remaining registers. The description of these register changes follows:4.10.1 OCR RegisterAll SD cards (memory, I/O and combo) shall have at least one OCR register. If the card is a combo card, itmay have two OCR's (one for memory and one for I/O). The memory portion of a combo card has an OCRaccessed using ACMD41 and CMD58. The I/O portion of a card has an OCR with the same structure that isaccessed via CMD5. If there are multiple OCR's the voltage range may not be identical. Some I/O functionsmay have a wider VDD range than that reflected in the I/O OCR register. The I/O OCR shall be the logicalAND of the voltage ranges(s) of all I/O functions. Note that the I/O OCR format is different from the memoryversion in that it is only 24 bits long. For details, refer to Table 3-1. The per-function voltage for each I/Ofunction can be read in the CIS for the card.4.10.2 CID RegisterThere shall be a maximum of one CID register per SD card. If the card contains both memory and I/O, theCID register information is unchanged from the Physical Layer Specification Version 1.01 and reflects theinformation from the memory portion of the card. If the card is I/O only, the CID register and the associatedaccess command (CMD10) are not supported. If the host attempts to access this register in an I/O only card,a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD mode shall notrespond.4.10.3 CSD RegisterThere shall be a maximum of one CSD register per SD card. If the card contains both memory and I/O, theCSD register information is unchanged from the Physical Layer Specification Version 1.01 and reflects theinformation from the memory portion of the card. If the card is I/O only, the CSD register and the associatedaccess command (CMD9) are not supported. If the host attempts to access this register in an I/O only card,a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD mode shall notrespond.4.10.4 RCA RegisterThere shall only be one RCA register per SD card. The RCA value shall apply to the card as a whole. Allfunctions and any memory share the same card address.4.10.5 DSR RegisterSDIO only cards do not support the DSR register. In the case of combo cards, support is optional as definedin the Physical Layer Specification.22

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association4.10.6 SCR RegisterThere shall be a maximum of one SCR register per SD card. If the card contains both memory and I/O, theSCR register information is unchanged from the Physical Layer Specification Version 1.01 and reflects theinformation from the memory portion of the card. If the card is I/O only, the SCR register and the associatedaccess command (ACMD51) are not supported. If the host attempts to access this register in an I/O onlycard, a card in SPI mode shall respond with an "Invalid Command" error response and a card in SD modeshall not respond.4.10.7 SD StatusThere shall be a maximum of one SD Status register per SD card. If the card contains both memory and I/O,the SD Status register information is unchanged from the Physical Layer Specification Version 1.01 andreflects the information from the memory portion of the card. If the card is I/O only, the SD Status register andthe associated access command (ACMD13) are not supported. If the host attempts to access this register inan I/O only card, a card in SPI mode shall respond with an "Invalid Command" error response and a card inSD mode shall not respond.4.10.8 Card Status RegisterThe structure of the SDIO status register is shown in Table 4-7. For SDIO specific operations in the SD modethat return the card status register contents (i.e. the response to CMD7), some bits are not applicable to I/Ooperations and shall be returned as 0. These unused bits are identified as type N/A. For combo cards, thevalues returned shall reflect the memory status. The CURRENT_STATE bits (12:9) shall reflect the memoryController State. For an I/O only card, the unused bits are 0 and the Current_State bits (12:9) shall be Fh (15)to identify it as an I/O only response.I/O specific status is reported by I/O response and Memory specific status is reported by Memory responseexcept for the following case: In the SD bus mode, the card shall not respond to an Illegal Command or acommand with a CRC error. The indication of those two error cases shall be given by the card in the followingcommand's response. This is true for an I/O only card as well as for combo cards, even in cases where theerroneous command and the command that follows are not targeting the same card module (Memory or I/O).Bit Identifier Type Value Description31 OUT_OF_RANGE ERX '0'= no error'1'= error23The command's argument was outof the allowed range for this card.ClearConditionC30 ADDRESS_ERROR N/A 0 Not used with SDIO operation C29 BLOCK_LEN_ERROR N/A 0 Not used with SDIO operation C28 ERASE_SEQ_ERROR N/A 0 Not used with SDIO operation C27 ERASE_PARAM N/A 0 Not used with SDIO operation C26 WP_VIOLATION N/A 0 Not used with SDIO operation C25 CARD_IS_LOCKED N/A 0 Not used with SDIO operation C24 LOCK_UNLOCK_FAILED N/A 0 Not used with SDIO operation C23 COM_CRC_ERROR ER '0'= no error'1'= errorThe CRC check of the previouscommand failed. (Note 1)22 ILLEGAL_COMMAND ER '0'= no error Previous command not legal for the B'1'= error card state. (Note 2)21 CARD_ECC_FAILED N/A 0 Not used with SDIO operation C20 CC_ERROR N/A 0 Not used with SDIO operation C19 ERROR ERX '0'= no error A general or an unknown errorC'1'= error occurred during the operation.18 UNDERRUN N/A 0 Not used with SDIO operation CB

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationBit Identifier Type Value DescriptionClearCondition17 OVERRUN N/A 0 Not used with SDIO operation C16 CID/ CSD_OVERWRITE N/A 0 Not used with SDIO operation C15 WP_ERASE_SKIP N/A 0 Not used with SDIO operation C14 CARD_ECC_DISABLED N/A 0 Not used with SDIO operation C13 ERASE_RESET N/A 0 Not used with SDIO operation C12:9 CURRENT_STATE SX 15=I/O only For an I/O only card, the current Bstate shall be fixed at a value of 0Fh.This indicates that it is an I/O onlycard and the normal memory statesdo not apply8 READY_FOR_DATA N/A 0 Not used with SDIO operation C7:6 Reserved5 APP_CMD N/A 0 CMD55 not used in SDIO operation C4 Reserved3 AKE_SEQ_ERROR N/A 0 Not used with SDIO operation C2 Reserved for application specific commands1, 0 Reserved for manufacturer test modeTable 4-7 : SDIO Status Register StructureNote 1: In the SPI mode, if the card detects a CRC error, it returns a com CRC error in the R1 responseimmediately following the command (Refer to Figure 3-7). In this situation, the note that the CRCerror is for the previous command does not apply.Note 2: In the SPI mode, if the card detects an Illegal Command, it returns an Illegal Command error in theR1 response immediately following the command (Refer to Figure 3-7). In this situation, the note thatthe Illegal Command error is for the previous command does not apply.24

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association5. New I/O Read/Write CommandsTwo additional data transfer instructions have been added to support I/O. IO_RW_DIRECT andIO_RW_EXTENDED, which allows fast access with byte or block addresses. Both commands are in class 9(I/O Commands).5.1 IO_RW_DIRECT Command (CMD52)The IO_RW_DIRECT is the simplest means to access a single register within the total 128K of registerspace in any I/O function, including the common I/O area (CIA). This command reads or writes 1 byte usingonly 1 command/response pair. A common use is to initialize registers or monitor status values for I/Ofunctions. This command is the fastest means to read or write single I/O registers, as it requires only a singlecommand/response pair.S D CommandIndex110100bR/WflagFunctionNumberRAWflagStuffRegisterAddressStuffWrite Dataor Stuff BitsCRC71 1 6 1 3 1 1 17 1 8 7 1Figure 5-1 : IO_RW_DIRECT CommandThe IO_RW_DIRECT Command contains the following fields:S(tart bit): Start bit. Always 0D(irection):Direction. Always1 indicates transfer host to card.Command Index: Identifies the "IO_RW_DIRECT" command with a value of 110100bR/W Flag:This bit determines the direction of the I/O operation. If this bit is 0, this commandshall read data from the SDIO card at the address specified by the Function Numberand the Register Address to the host. The data byte is returned in the response, R5.If this bit is set to 1, the command shall write the bytes in the Write Data field to theI/O location addressed by the Function Number and the Register Address. If theRAW flag is 0, then the data in the register that was written shall be read and thatvalue returned in the response.RAW Flag:The Read after Write flag. If this bit is set to 1 and the R/W flag is set to 1, then thecommand shall read the value of the register after the write. This is useful to allowwriting to a control register and reading the status at the same address. If this bit iscleared, the value returned in the R5 response shall be the same as the write data inthe command. If this bit is set, the data field of the R5 response shall contain thevalue read from the addressed register after the write operation.Function Number: The number of the function within the I/O card you wish to read or write. Note thatfunction 0 selects the common I/O area (CIA).Register Address: This is the address of the byte of data inside of the selected function to read or write.There are 17 bits of address available so the register is located within the first 128K(131,072) addresses of that function.Write Data/Stuff Bits: For a direct write command (R/W=1), this is the byte that is written to the selectedaddress. For a direct read (R/W=0), this field is not used and shall be set to 0.CRC7:7 bits of CRC dataE(nd bit): End bit, always 1E25

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association5.2 IO_RW_DIRECT Response (R5)The SDIO card's response to CMD52 shall be in one of two formats. If the communication between the cardand host is in the 1-bit or 4-bit SD mode, the response shall be in a 48-bit response (R5) as described inSection 5.2.1. If the communication is using the SPI mode, the response shall be a 16-bit R5 response asdescribed in Section 5.2.2.5.2.1 CMD52 Response (SD Modes)The SDIO card's response to CMD52 in the SD mode is shown in Figure 5-2. If the operation was a readcommand, the data being read is returned as an 8-bit value. In addition, 15 bits of status information isreturned. The format of the SD response is as follows:S DCommandIndex110100bStuffResponse FlagsBit7--------------------------0Read or WriteDataCRC71 1 6 16 8 8 7 1Figure 5-2 : R5 IO_RW_DIRECT Response (SD Modes)The IO_RW_DIRECT response (R5) contains the following fields:S(tart bit): Start bit. Always 0D(irection):Direction. 0 indicates transfer card to host (Response)Command Index: Identifies the "IO_RW_DIRECT" command with a value of 110100bStuff Bits Not used, shall be set to 0Response Flags 8 Bits of flag data indicating the status of the SDIO card. Table 5-1 shows the formatof these flag bits.Read or Write Data: For an I/O write (R/W=1) with the RAW Flag set (RAW=1) this field shall contain thevalue read from the addressed register after the write of the data contained in thecommand. Note that in this case, the read-back data may not be the same as thedata written to the register, depending on the design of the hardware. For an I/Owrite with the RAW bit=0, the SDIO function shall not do a read after write operation,and the data in this field shall be identical to the data byte in the write command. Foran I/O read (R/W=0), the actual value read from that I/O location is returned in thisfield.CRC7:7 bits of CRC dataE(nd bit): End bit, always 1EBits Identifier Type Value Description ClearCondition7 COM_CRC_ERROR E R '0'= no error The CRC check of the previous B'1'= error command failed.6 ILLEGAL_COMMAND E R '0'= no error'1'= errorCommand not legal for the cardState.B26

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationBits Identifier Type Value Description ClearCondition5-4 IO_CURRENT_STATE S 00=DIS DIS=Disabled:B01=CMD02=TRN03=RFUInitialize, Standby and InactiveStates (card not selected)CMD=DAT lines free:1. Command waiting (Notransaction suspended)2. Command waiting (AllCMD53 transactionssuspended)3. Executing CMD52 in CMDStateTRN=Transfer:Command executing with datatransfer using DAT[0] or DAT[3:0]lines3 ERROR ERX '0'= no error A general or an unknown error C'1'= error occurred during the operation.2 RFU -- Fixed at 0 Reserved for Future Use C1 FUNCTION_NUMBER ER '0'= no error'1'= errorAn invalid function number wasrequestedC0 OUT_OF_RANGE ERX '0'= no error'1'= errorER: The command's argumentwas out of the allowed range forthis card.EX: Out of range occurs duringexecution of CMD53.Table 5-1 : Flag Data for IO_RW_DIRECT SD Response5.2.2 R5, IO_RW_DIRECT Response (SPI mode)The SDIO card's response to CMD52 in the SPI mode is shown in Figure 5-3. If the operation was a readcommand, the data being read is returned as an 8-bit value. In addition, 8 bits of status information isreturned in a SPI R1 response byte as described in Figure 7-9 of the Physical Layer Specification Version3.0x modified for SDIO as shown in Figure 5-3.C0 00R/W Data (8 Bits)1 = in idle stateRFU (always 0)1 = illegal command1 = COM CRC error1 = Function number errorRFU (always 0)1 = parameter errorStart Bit (always 0)Figure 5-3 : IO_RW_DIRECT Response in SPI ModeNote the read/write (R/W) data is identical to the read/write data described for the SD R5 response (Refer toSection 5.2.1). Parameter error status in SPI mode corresponds to OUT_OF_RANGE and ERROR in theSD mode response. In the case of CMD53, Data Error Token should also be used to indicateOUT_OF_RANGE and ERROR.27

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association5.3 IO_RW_EXTENDED Command (CMD53)In order to read and write multiple I/O registers with a single command, a new command,IO_RW_EXTENDED is defined. This command is included in command class 9 (I/O Commands). Thiscommand allows the reading or writing of a large number of I/O registers with a single command. Since thisis a data transfer command, it provides the highest possible transfer rate.S D CommandIndex110101bR/WflagFunctionNumberBlockModeOPCodeRegister AddressByte/BlockCountCRC71 1 6 1 3 1 1 17 9 7 1Figure 5-4 : IO_RW_EXTENDED CommandThe IO_RW_EXTENDED Command contains the following fields:S(tart bit): Start bit. Always 0D(irection): Direction. Always1 indicates transfer host to card.Command Index: Identifies the "IO_RW_EXTENDED" command with a value of 110101bR/W Flag:This bit determines the direction of the I/O operation. If this bit is 0, this commandreads data from the SDIO card at the address specified by the Function Number andthe Register Address to the host. The read data shall be returned on the DAT[x] lines.If this bit is set to 1, the command shall write the bytes from the DAT[x] lines to the I/Olocation addressed by the Function Number and the Register Address.Function Number: The number of the function within the I/O card you wish to read or write. Note thatfunction 00h selects the common I/O area (CIA).Block Mode (Optional) this bit, if set to 1, indicates that the read or write operation shall beperformed on a block basis, rather than the normal byte basis. If this bit is set, theByte/Block count value shall contain the number of blocks to be read/written. Theblock size for functions 1-7 is set by writing the block size to the I/O block size registerin the FBR (Refer to Table 6-3 and Table 6-4). The block size for function 0 is set bywriting to the FN0 Block Size register in the CCCR. Card and host support of the blockI/O mode is optional. The host can determine if a card supports block I/O by readingthe Card supports MBIO bit (SMB) in the CCCR (Refer to Table 6-2). The block sizeused when Block Mode = 1 and the maximum byte count per command used whenBlock Mode = 0 can be read from the CIS in the tuple TPLFE_MAX_BLK_SIZE (Referto Section 16.7.4) on a per-function basis.OP code Defines the read/write operation as described in Table 5-2OP codeCommand operation0 Multi byte R/W to fixed address1 Multi byte R/W to incrementing addressTable 5-2 : IO_RW_ EXTENDED command Op Code Definition• OP Code 0 is used to read or write multiple bytes of data to/from a single I/O registeraddress. This command is useful when I/O data is transferred using a FIFO inside ofthe I/O card. In this case, multiple bytes of data are transferred to/from a single registeraddress. For this operation, the address of the register is set into the Register Addressfield. Data is transferred on the DAT[0] or DAT[3:0] lines as defined for SD memorycards.• OP Code 1 is used to read or write multiple bytes of data to/from an I/O registeraddress that increment by 1 after each operation. This command is used when largeamounts of I/O data exist within the I/O card in a RAM like data buffer. In this operation,E28

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Associationthe start address is loaded into the Register Address field. The first operation occurs atthat address within the I/O card. The next operation shall occur at address+1 with theaddress incrementing by 1 until the operation has completed. As with OP Code 0, thenumber of bytes is set in the Byte Count field of the command.Register Address: Start Address of I/O register to read or write. Range is [1FFFFh:0]Byte/Block Count If the command is operating on bytes (Block Mode = 0), this fieldcontains the number of bytes to read or write. A value of 000h shall cause 512 bytes tobe read or written.Count Value 000h 001h 002h ---- 1FFhBytes Transferred 512 1 2 511Block Transferred infinite 1 2 511Table 5-3 : Byte Count ValuesCRC7:7 bits of CRC dataE(nd bit): End bit, always 1If the command is in block mode (Block Mode=1), the Block Count field specifies thenumber of Data Blocks to be transferred following this command. A value of 000hindicates that the count set to infinite. In this case, the I/O blocks shall be transferreduntil the operation is aborted by writing to the I/O abort function select bits (ASx) in theCCCR (Refer to Table 6-1 and Table 6-2). Table 5-3 shows the relationship betweenthe value in the command and the actual number of bytes transferred.The response from the SDIO card to CMD53 shall be R5 (the same as CMD52) as defined in 5.2. ForCMD53, the 8-bit data field shall be stuff bits and shall be read as 00h. Also, the ERROR response bit shall betype "E R X" (Refer to Table 5-1).5.3.1 CMD53 Data Transfer FormatWhen executing the IO_RW_EXTENDED (CMD53), the multi-byte or multi-block data transfer is similar tothe data transfer for memory. For the multi-byte transfer modes (block mode=0) the following applies:IO_RW_EXTENDED byte read is similar to CMD17 (READ_SINGLE_BLOCK)IO_RW_EXTENDED byte write is similar to CMD24 (WRITE_BLOCK)Note that the byte count for this transfer is set in the command, rather than the fixed block size. Thus, thesize of the data payload is in the range of 1-512 bytes. The block mode is similar to the following memorycommands:IO_RW_EXTENDED block read is similar to CMD18 (READ_MULTIPLE_BLOCK)IO_RW_EXTENDED block write is similar to CMD25 (WRITE_MULTIPLE_BLOCK)For the block mode the only difference is that for a fixed block count, the host does not need to stop thetransfer, as it continues until the block count is satisfied. If the block count is set to zero, the operation isidentical to the memory mode in that the host must stop the transfer.5.3.2 Special Timing for CMD53 Multi-Block ReadThis section is not included in the Simplified Specification.29

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association6. SDIO Card Internal OperationI/O access differs from memory in that the registers can be written and read individually and directly withouta FAT file structure or the concept of blocks (although block access is supported). These registers allowaccess to the I/O data, control of the I/O function and report on status or transfer I/O data to/from the host.SD memory relies on the concept of a fixed block length with commands reading/writing multiples of thesefixed size blocks. I/O may or may not have fixed block lengths and the read size may be different from thewrite size. Because of this, I/O operations may be based on either a length (byte count) or a block size.6.1 OverviewEach SDIO card may have from 1 to 7 functions plus one memory function. A function is a self contained I/Odevice. I/O functions may be identical or completely different from each other. All I/O functions are organizedas a collection of registers. There is a maximum of 131,072 (2 17 ) registers possible for each I/O function.These registers and their individual bits may be read Only (RO), Write Only (WO) or Read/Write (R/W).These registers can be 8, 16 or 32 bits wide within the card. All addressing is based on byte access. Theseregisters can be written and/or read one at a time, multiply to the same address or multiply to anincrementing address. The single R/W access is often used to initialize the I/O function or to read a singlestatus or data value. The multiple reads to a fixed address are used to read or write data from a data FIFOregister in the card. The read to incrementing addresses is used to read or write a collection of data to/froma RAM area inside of the card. Figure 6-1 shows the mapping of the CIA and optional CSA space for anSDIO card.6.2 Register Access TimeAll registers in SDIO only cards and the SDIO portion of Combo cards shall complete read and write datatransfers in less than one second. This timeout value relates to the time for the requested data to betransferred to/from the host on the DAT[x] lines and not the timing between the command and the response.This wait time is signaled to the host by the card using busy for a write or delaying the start bit for a readoperation. The host can use one second as the timeout value for a non-responding location. If a functionsneeds to support an access time greater than one second, the card maker may use some function specificmethod that is not defined in this specification.6.3 InterruptsAll SDIO hosts should support hardware interrupts. If a host does not support interrupts, it may havedifficulties working with SDIO cards that expect fast response to interrupt conditions. Each function within anSDIO or Combo card may implement interrupts as needed. The interrupt used on SDIO functions is a typecommonly called "level sensitive". Level sensitive means that any function may signal for an interrupt at anytime, but once the function has signaled an interrupt, it shall not release (stop signaling) the interrupt until thecause of the interrupt is removed or commanded to do so by the host. Since there is only 1 interrupt line, itmay be shared by multiple interrupt sources. The function shall continue to signal the interrupt until the hostresponds and clears the interrupt. Since multiple interrupts may be active at once, it is the responsibility ofthe host to determine the interrupt source(s) and deal with it as needed. This is done on the SDIO function bythe use of two bits, the interrupt enable and interrupt pending. Each function that may generate an interrupthas an interrupt enable bit. In addition, the SDIO card has a master interrupt enable that controls allfunctions. An interrupt shall only be signaled to the SD bus if both the function's enable and the card's masterenable are set. The second interrupt bit is called interrupt pending. This read-only bit tells the host whichfunction(s) may be signaling for an interrupt. There is an interrupt pending bit for each function that cangenerate interrupts. These bits are located in the CCCR area. For more details, refer to Table 6-1 and Table6-2. Interrupt operation is described more fully in Section 8.Asynchronous Interrupt is defined SDIO Version 3.00. Asynchronous Interrupt is effective in SD 4-bit mode.Asynchronous Interrupt Period, which can generate interrupt without SD clock, is defined in theSynchronous Interrupt Period after the last data block and until a next command is received. Refer to Section8.2 for more detail.30

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association6.4 Suspend/ResumeWithin a multi-function SDIO or a Combo card, there are multiple devices (I/O and memory) that shareaccess to the SD bus. In order to allow the sharing of access to the host among multiple devices, SDIO andcombo cards can implement the optional concept of suspend/resume. If a card supports suspend/resume,the host may temporarily halt a data transfer operation to one function or memory (suspend) in order to freethe bus for a higher priority transfer to a different function or memory. Once this higher-priority transfer iscomplete, the original transfer is re-started where it left off (resume). Support of suspend/resume is optionalon a per-card basis. If suspend/resume is implemented, it shall be supported by the memory of a Combocard and all I/O functions except 0 (the CIA). Note that the host can suspend multiple transactions andresume them in any order desired. I/O function 0 does not support suspend/resume. Suspend/Resume isdescribed in more detail in Chapter 9. Any card that supports Suspend/Resume shall also support Read Waitand Direct Commands (08h: SRW and 08h: SDC = 1) Note that Suspend/Resume is defined only for the SD1 and 4-bit modes. It does not apply to SPI transfers.6.5 Read WaitHost devices shall control the SDCLK to stop the read data block output from a card executing a multipleread command whenever the host cannot accept more data. During the time that the host has stopped theSDCLK, a CMD52 cannot be issued. This limitation causes a problem in that a host device cannot performthe I/O command during a multiple read cycle.In order to eliminate this limitation, the SDIO Specification adds the Read Wait control to enable the host toissue CMD52 during a multiple read cycle. Read Wait uses the DAT[2] line to allow the host to signal the cardto temporarily halt the sending of read data by a card. This feature is optional for an SDIO or combo card.However, if an SDIO or combo supports Read Wait, all functions and any memory shall support Read Wait.Read Wait is described in more detail in Chapter 10. Any card that supports Suspend/Resume shall alsosupport Read Wait. Note that Read Wait is defined only for the SD 1 and 4-bit modes. It does not apply to SPItransfers.6.6 CMD52 During Data TransferA card may accept CMD52 during data transfer if it supports Direct Commands (Refer to 08h: SDC, Table6-2). For both SD and SPI modes, if an error occurs during data transfer the SDIO card shall accept CMD52to allow I/O abort and reset regardless of this bit value of the value of 08h: SDC.6.7 SDIO Fixed Internal MapThe SDIO card has a fixed internal register space and a function unique area. The fixed area containsinformation about the card and certain mandatory and optional registers in fixed locations. The fixedlocations allow any host to obtain information about the card and perform simple operations such as enablein a common manner. The function unique area is a per-function area, which is defined either by theApplication Specifications for Standard SDIO functions or by the vendor for non-standard functions. Figure6-1 shows the internal map of an SDIO card with multiple functions.31

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationCIA (Function 0)0x000000-0x0000FF0x000100-0x0001FF0x000200-0x0002FFCCCRFBR (Function 1)FBR (Function 2)WindowWindow0x000300-0x0003FF0x000700-0x0007FF0x000800-0x000FFF0x001000-0x017FFFFBR (Function 3)FBR (Function 7)RFUWindowWindowCIS Area(common and per-function)XX16 MB optionalCode StorageArea(CSA)0x018000-0x01FFFFRFUCIS Pointers128K Register Space(function 1-7)0x000000-0x01FFFFFunction UniqueFigure 6-1 : SDIO Internal Map6.8 Common I/O Area (CIA)The Common I/O Area (CIA) shall be implemented on all SDIO cards. The CIA is accessed by the host viaI/O reads and writes to function 0. The registers within the CIA are provided to enable/disable the operationof the I/O function(s), control the generation of interrupts and optionally load software to support the I/Ofunctions. The registers in the CIA also provide information about the function(s) abilities and requirements.There are three distinct register structures supported within the CIA. They are:1. Card Common Control Registers (CCCR)2. Function Basic Registers (FBR)3. Card Information Structure (CIS)6.9 Card Common Control Registers (CCCR)The Card Common Control Registers allow for quick host checking and control of an I/O card's enable andinterrupts on a per card (master) and per function basis. The bits in the CCCR are mixed Read/Write andread only. If any of the possible 7 functions are not provided on an SDIO card, the bits corresponding tounused functions shall all be read-only and read as 0. All reserved for future use bits (RFU) shall beread-only and return a value of 0. All writeable bits are set to 0 after power-up or reset. Access to the CCCRis possible even after initialization when the I/O functions are disabled. Access is performed using the I/Oread and write commands defined in Chapter 5. This allows the host to enable functions after initialization.The CCCR is organized as follows:32

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddress Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 000h CCCR/SDIORevisionSDIObit 3SDIObit 2SDIObit 1SDIObit 0CCCRbit 3CCCRbit 2CCCRbit 1CCCRbit 001h SD SpecificationRevisionRFU RFU RFU RFU SDbit 3SDbit 2SDbit 1SDbit 002h I/O Enable IOE7 IOE6 IOE5 IOE4 IOE3 IOE2 IOE1 RFU03h I/O Ready IOR7 IOR6 IOR5 IOR4 IOR3 IOR2 IOR1 RFU04h Int Enable IEN7 IEN6 IEN5 IEN4 IEN3 IEN2 IEN1 IENM05h Int Pending INT7 INT6 INT5 INT4 INT3 INT2 INT1 RFU06h I/O Abort RFU RFU RFU RFU RES AS2 AS1 AS007h Bus InterfaceControlCDDisableSCSI ECSI RFU RFU S8B BusWidth 1BusWidth 008h Card Capability 4BLS LSC E4MI S4MI SBS SRW SMB SDC09h- Common CISPointer to card's common Card Information Structure (CIS)0Bh Pointer0Ch Bus Suspend RFU RFU RFU RFU RFU RFU BR BS0Dh Function Select DF RFU RFU RFU FS3 FS2 FS1 FS00Eh Exec Flags EX7 EX6 EX5 EX4 EX3 EX2 EX1 EX00Fh Ready Flags RF7 RF6 RF5 RF4 RF3 RF2 RF1 RF011h-10h FN0 Block Size I/O block size for Function 012h Power Control RFU RFU RFU RFU RFU RFU EMPC SMPC13h Bus Speed Select RFU RFU RFU RFU BSS2 BSS1 BSS0/ SHSEHS14h UHS-I Support RFU RFU RFU RFU RFU SDDR50 SSDR104 SSDR5015h Driver Strength RFU RFU DTS1 DTS0 RFU SDTD SDTC SDTA16h Interrupt Extension RFU RFU RFU RFU RFU RFU EAI SAIEFh-17h RFU Reserved for Future Use (RFU)FFh-F0h Reserved forArea Reserved for Vendor Unique RegistersVendorsTable 6-1 : Card Common Control Registers (CCCR)Addr: Field Type Description00h:CCCRxR/O CCCR Format Version number.These 4 bits contain the version of the CCCR and FBR format that this cardsupports. Any change to the CCCR and/or the FBR structure shall cause a newversion code to be assigned. The codes for the CCCR/FBR formats are asfollows:Value CCCR/FBR Format Version00h CCCR/FBR defined in SDIO Version 1.0001h CCCR/FBR defined in SDIO Version 1.1002h CCCR/FBR defined in SDIO Version 2.0003h CCCR/FBR defined in SDIO Version 3.0004h-0Fh Reserved for Future Use33

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description00h: SDIOx R/O SDIO Specification Revision NumberThese 4 bits contain the version of the SDIO Specification that this card supports.The codes for the SDIO Specifications are as follows:Value SDIO Specification00h SDIO Specification Version 1.0001h SDIO Specification Version 1.1002h SDIO Specification Version 1.20 (unreleased)03h SDIO Specification Version 2.0004h SDIO Specification Version 3.0005h-0Fh Reserved for Future Use01h: SDx R/O SD Format Version NumberThese 4 bits contain the codes for the version of the Physical Layer Specificationthat this card supports.Value Physical Layer Specification00h Physical Layer Specification Version 1.01 (March 2000)01h Physical Layer Specification Version 1.10 (October 2004)02h Physical Layer Specification Version 2.00 (May 2006)03h Physical Layer Specification Version 3.0x04h-0Fh Reserved for Future Use02h: IOEx R/W Enable FunctionIf this bit is reset to 0, the function is disabled. If this bit is set to 1, the function isenabled to start its initialization. The completion of initialization is indicated inIORx. On power up or after a reset, the card shall reset this bit to 0. The host canalso use IOEx as a per function reset for error recovery. The host sequence for aper function reset is to reset IOEx to 0, wait until IORx becomes 0 and then setIOEx to 1 again. If the error is not recovered by this sequence, SDIO reset shouldbe used noting that the operation of all functions will be aborted. Refer to Chapter11 for relation to Master Power Control and Power Select.03h: IORx R/O I/O Function ReadyIf this bit is reset to 0, the function is not ready to operate. This may be caused bythe function being disabled or not ready due to internal causes such as a built-inself-test in progress. If this bit is set to 1, the function is ready to operate. Thefunctions shall set this bit to 1 within the timeout value defined in theTPLFE_ENABLE_TIMEOUT_VAL tuple. On power up or after a reset, this bitshall be set to 0. For any function that is not implemented on an SDIO card, thisbit shall always be 0.04h: IENx R/W Interrupt Enable for Function xIf this bit is cleared to 0, any interrupt from this function shall not be sent to thehost. If this bit is set to 1, then this function's interrupt shall be sent to the host ifthe master Interrupt Enable (bit 0) is also set to 1.04h: IENM R/W Interrupt Enable MasterIf this bit is cleared to 0, no interrupts from this card shall be sent to the host. If thisbit is set to 1, then any function's interrupt shall be sent to the host.05h: INTx R/O Interrupt Pending for Function xIf this bit is cleared to 0, this indicates that no interrupts are pending from thisfunction. If this bit is set to 1, then this function has interrupt pending. Note that ifthe IENx or IENM bits are not set, the host cannot receive this pending interrupt.34

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description06h: ASx W/O Abort SelectIn order to abort an I/O read or write and free the SD bus, the function that iscurrently transferring data must be addressed. These 3 bits define whichfunction's transfer to stop. For example, the abort the transfer to function number3, the value of 03h would be written to these bits using CMD52 only. If the abort isaddressed to a suspended function, it does not affect current data transaction.Note that this is an abort, not a reset. The addressed function shall return to theCMD state and data transfer pending to that function shall be halted. This abortprocedure does not work for SPI write operations. To abort an SPI write datatransfer use the STOP_TRAN token as defined in Section 7.3.3 of the PhysicalLayer Specification. This form of abort applies only to the functions of an SDIOcard. For the memory of a combo card, the abort methods defined in the PhysicalLayer Specification shall be used to abort transfers to/from memory06h: RES W/O I/O CARD RESETSetting the RES to 1 shall cause all I/O functions in an SDIO or Combo card toperform a soft reset. Setting the RES to 1 does not affect the current card protocolselection (SD vs. SPI mode) and CD Disable. Setting of the RES bit shall only beperformed using CMD52. When RES=1, the values of AS2-0 are don't-cares.The RES bit is auto cleared, so there is no need to rewrite a value of 0. This bit iswrite-only, any read returns an undetermined value. Memory in a combo card isnot affected.07h: BusWidth 1:0R/WBus WidthThis field selects the bus width of the DAT line for a data transfer. All Full-SpeedSDIO cards shall support both 1 and 4-bit bus widths. A Low-Speed SDIO card'ssupport of 4-bit bus is optional. 1-bit bus width is the default. On reset orpower-on these bits are cleared to 00. 8-bit bus mode can be supported only foran embedded device. 8-bit mode can be set if S8B is set to 0.00b: 1-bit01b: Reserved10b: 4-bit bus11b: 8-bit bus (only for embedded SDIO)07h: S8B R/O Support 8-bit Bus ModeThis support bit is valid for embedded SDIO. SDIO card shall set this bit to 0.0: 8-bit bus mode is not supported.1: 8-bit bus mode is supported.(The details of 8-bit mode are not defined in this document but it will be defined ina future specification.)07h: ECSI R/W Enable Continuous SPI InterruptIf the SCSI bit is set, then this R/W bit is used to allow the SDIO card to assert theinterrupt line in the SPI mode at any time, irrespective of the state of the CS line.This bit is cleared to zero on reset or power-up. If the SCSI bit is clear, this bitshall be read only and set to zero. This bit controls the assertion of interrupts inthe SPI mode for all functions in the SDIO card.07h: SCSI R/O Support Continuous SPI interruptThis read-only bit is set to indicate that this SDIO card supports the assertion ofinterrupts in the SPI mode at any time, irrespective of the status of the card select(CS) line. If this bit is zero, then this SDIO card can only assert the interrupt line inthe SPI mode when the CS line is asserted. This bit signals the capability of allfunctions in the SDIO card.35

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description07h: R/WCD DisableCard Detect DisableConnect[0]/Disconnect[1] the 10K-90K ohm pull-up resistor on CD/DAT[3] (pin 1)of the card. The pull-up may be used for card detection. This bit is cleared to 0 onpower-on (connected). Its state is not affected by a reset command.This bit shall be set to 1 before issuing CMD53.08h: SDC R/O Support Direct Command (CMD52)Support bit of Direct Commands. This bit applies only to the SD modes, it doesnot apply to SPI mode. This flag bit reports the SDIO card's ability to executeCMD52 while data transfer is in progress. If this bit is set, all I/O functions shallaccept and execute the CMD52 while data transfer is underway on the DAT[x]lines. Also, any memory in a combo card shall allow the CMD52 to execute whileit is transferring data. Since the CMD52 does not use the DAT[x] lines, it ispossible to execute while data transfer to a different address on the card isunderway. CMD52 is described in 5.1. In SD or SPI mode, if an error occursduring data transfer the SDIO card shall accept a CMD52 to allow I/O abort andreset regardless of this bit value. If the card supports suspend/resume then itshall also support this bit.08h: SMB R/O Support Multiple Block TransferSupport bit of Multi-Block transfer. This flag bit reports the SDIO card's ability toexecute the IO_RW_EXTENDED command (CMD53) in the block mode. If thisbit is set, all I/O functions (0-7) shall accept and execute CMD53 with the optionalblock mode bit set. The IO_RW_EXTENDED command is described in 5.308h: SRW R/O Support Read WaitSupport bit of Read Wait control. This bit applies only to the SD modes, it doesnot apply to SPI mode. This flag bit reports the SDIO card's ability to support theRead Wait Control (RWC) operation. If set, all functions on the card are able toaccept the wait signal on DAT[2]. RWC operation is described in Section 6.5. Anycard that supports Suspend/Resume shall also support Read Wait08h:SBS R/O Support Bus ControlSupport bit of Suspend/Resume. This bit applies only to the SD modes, it doesnot apply to SPI mode. This flag bit reports the SDIO card's ability to Suspendand Resume operations at the request of the host. If this bit is set, all functionsexcept 0 shall accept a request to suspend operations and resume under hostcontrol. Suspend/Resume operation is described in Section 6.4. If this bit is 0,registers (0Ch-0Fh) shall not be supported.08h:S4MI R/O Support Block Gap InterruptSupport bit of interrupt between blocks of data in 4-bit SD mode. This flag bitreports the SDIO card's ability to generate interrupts during a 4-bit multi-blockdata transfer. If this bit is 0, then the SDIO card is not able to signal an interruptduring a multi-block data transfer in 4-bit mode. In this case, the interrupt is notsignaled until after the data transfer is complete. If this bit is 1, then the SDIO cardis able to signal an interrupt between blocks while data transfer is in progress.This operation is described in 8.1.4 Note, even if a card does not support theinterrupt during 4-bit block transfer (S4MI=0), the card may signal interruptsduring all other Interrupt Periods while the interrupt is enabled (IENx=1).36

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description08h:E4MI R/W Enable Block Gap InterruptEnable bit of interrupt between blocks of data in 4-bit SD mode. Enable themulti-block IRQ during 4-bit transfer for the SDIO card. When this bit is 0, the cardshall not signal interrupts during a 4-bit multi-block data transfer. If this bit is 1, thecard shall generate interrupts during 4 bit multi-block data transfers as describedin 8.1.4 If this SDIO card does not support 4 bit multi-block IRQs (S4MI=0), thenthis bit shall be R/O and always read as 0. This bit shall be cleared to 0 by anyreset.When operating more than 25MB/sec data rate in SDR50, SDR104 or DDR50,Block Gap Interrupt shall not be used (this bit is set to 0). It is difficult for a host touse the narrow interrupt period considering propagation delay from card to host.08h:LSC R/O Low-Speed CardIf this bit is set, it indicates that the SDIO card is a Low-Speed card (Refer toSection 2.1). If this bit is clear, the SDIO card is a Full-Speed card.08h:4BLS R/O 4-bit Mode Support for Low-Speed CardIf the SDIO card is a Low-Speed card (LSC=1) and it supports 4-bit data transfer,then this bit shall be set. If the card is not Low-Speed or if the card does notsupport 4-bit transfer, then this bit shall be zero.09h-0Bh:Pointer tocard'scommonCISR/OCommon CIS PointerThis 3-byte pointer points to the start of the card's common CIS. The commonCIS contains information relation to the entire card. The card common CIS shallbe located within the CIS space of function 0 (001000h- 017FFFh) as describedin Section 6.11. A card common CIS is mandatory for all SDIO cards. This pointeris stored in little-endian format (LSB first).0Ch: BS R/O Bus StatusIf this bit is set to 1, then the currently addressed function (selected by FSx or bythe function number in an I/O command) is currently executing a command whichtransfers data on the DAT[x] line(s). If this bit is 0, then the addressed function isnot using the data bus. This bit is used by the host to determine which function ofa multi-function or combo card is currently performing data transfer. Note that thisbit is a part of the optional Suspend/Resume protocol. If the card does notsupport Suspend/Resume, this bit shall be read as 0. Any access to the CIA maynot be suspended, so in this case, BS shall always be set to 1, irrespective of thehost setting BR to 1.37

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description0Ch: BR R/W Bus Release RequestThis bit is used to request that the addressed function (selected by FSx or by thefunction number in CMD53 or Memory commands using DAT line) release theData lines and suspend operation. If the host sets this bit to 1, the addressedfunction shall temporarily halt data transfer on the DAT[x] lines and suspend thecommand that is in process. The BR bit shall remain set to 1 until the release iscomplete. If the card can never accept the suspend request while executingtransactions, the card shall return response with BR cleared to 0 and BS set to 1.This indicates that the suspend request is cancelled by the card and thus the hostshould not issue a cancel suspend command.The followings are the cases where the card can cancel a suspend request:Transaction addressed to function 0.The card knows the transfer will terminate soon.The card knows the transfer is timing critical (i.e. If suspended, the transfercannot proceed).A Multi function card that indicates SBS=1, but contains a function that does notsupport suspend/resume.Once the function is in suspend, it shall signal the host by clearing the BS and BRbits. The host can monitor the status of the suspend request by reading the BRbit. If it is set, the suspend request is still in progress. A pending suspend requestcan be cancelled by the host by writing 0 to the BR bit.The Standard Host Specification defines following suspend sequence:If the suspend request is not accepted, the host retries with a cancel suspendrequest command. Even if the card received a cancel suspend command, itshould accept suspend if possible. If the card does not accept suspend, the hostconsiders the function to have never suspend.However, the host should monitor the BR, BS and EXx bits to confirm that thesuspend request was cancelled. If SBS=0, this bit shall be R/O and read as 0.0Dh: FSx R/W Select FunctionThese four bits are used to select a function number (0-7) or the memory of acombo card (8) for Suspend/Resume. There are two methods to write the valueof FSx. First, an I/O write to the register in the CCCR and second, a new I/Ocommand that causes the FSx to be set to the function number in that command.The value of FSx shall remain until overwritten. If a function or memory iscurrently suspended, the writing of its number to FSx shall re-start (resume) thedata transfer operation When reading FSx, the value returned shall be thenumber of the currently addressed function. Note that when reading FSx, if theBus Status is 0 (BS=0), the FSx value is undefined. The FSx bits are coded asfollows:FSxCurrent Transaction0000 Transaction of function 0 (CIA)0001-0111 Transaction to functions 1-71000 Transaction of memory in combo card1001-1111 Not defined, reserved for future useIf SBS=0 these bits shall be R/O.38

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description0Dh: DF R/O Data FlagA data transaction is resumed by writing its number to FSx. Once the transactionis resumed, the DF indicates if more data will be transferred. If DF is cleared to 0,then no additional data will be transferred after the function or memory isresumed. If DF is set to 1, then there is more data to transfer that will begin afterthe function or memory in resumed. The DF flag can be used to control theinterrupt cycle in 4-bit mode. If DF=1, there is more data to transfer after restoringthe function. In this case, the interrupt cycle should be disabled. If DF=0, thefunction or memory was suspended at end of data transfer (during busy). In thiscase, no data transfer shall begin after resume so the host can detect a startinterrupt cycle after restore. When resuming, if the suspended function cannotcontinue data transfer the card shall return DF=0 to abort the transfer.0Eh: EXx R/O Execution FlagThese 8 bits are used by the host to determine the current execution status of allfunctions (1-7) and memory (0). The bit is set to 1 for each function or memorythat is currently executing a command. The EXx bits tell the host that a function ormemory is currently executing a command so no additional command should beissued to that function/memory. These bits are only defined if SBS=1. This bit isset if the function is active. If SBS=0 these bits shall be read as zero.0Fh: RFx R/O Ready FlagThese 8 bits tell the host the read or write busy status for functions (1-7) andmemory (0). If a function or memory is executing a write transaction, an RFx bitcleared to 0 indicates the function/memory is busy and not ready to accept moredata. If the RFx bit is set to 1, then the function/memory can accept write data. Ifa function/memory is executing a read command, if the RFx bit is cleared to 0, itindicates that read data is NOT available. If the bit is set to 1, it indicates that readdata is ready to be transferred. These bits are only defined if SBS=1. Setting a bitto 1 indicates the function is ready to accept the resume command. There are twoconditions where the function will set the bit to 1. One is when the function(executing or suspended) is ready to continue data transfer. The second is whenthe suspended function cannot continue data transfer. If SBS=0 these bits shallbe read as zero.10h-11h:FN0 BlockSizeR/W Block Size for Function 0This 16-bit register sets the block size for I/O block operations for Function 0 only.If this card does not support I/O block operations (SMB=0), then this registerbecomes read-only and shall always read 0000h. The maximum block size is2048 (0800h) and the minimum is 1. At power-up or reset, this register shall beinitially loaded with a value of 0000h. The host is responsible for setting theappropriate value for the block size supported by function 0. This pointer is storedin little-endian format (LSB first).12h: SMPC R/O Support Master Power ControlThese bits tell the host if the card supports Master Power Control.SMPC=0: The total card power is up to 720mW (3.6Vx200mA), even if allfunctions are active (IOEx=1). EMPC, SPS and EPS shall be zero.SMPC=1: The total card power may exceed 720mW (3.6Vx200mA). Controls ofEMPC, SPS and EPS are available.39

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description12h: EMPC R/W Enable Master Power ControlEMPC=0 (default): The total card power shall be up to 720mW (3.6Vx 200mA).The card automatically switches the mode of function(s) to lower current or doesnot allow some functions to become enabled, regardless of the value of EPS, sothat total card power is 720mW or less. (The card manufacturer determines whichfunctions operate and their modes to guarantee this limit.)EMPC=1: The total card power may exceed 720mW and SPS and EPS areavailable. The host uses SPS, EPS in FBR and IOEx to enable higher currentfunction modes based on the host's ability to supply the necessary current.If PS[3:0]=0 (Ver1.10 compatible), two power modes can be selected by usingSPS, EPS in FBR for an SDIO Card supporting 2.7V-3.6V Power supply range.PS[3:0] >0 is defined by Ver3.00 Power Control Extension (Applicable to multiplevoltages device).13h: SHS R/O Support High-SpeedThis flag bit reports the card's ability to operate in High-Speed modeSHS=0: The card does not support High-Speed modeSHS=1: The card supports High-Speed mode. The host enables High-Speedmode via the EHS bit. Refer to Chapter 12 for details on switching betweendefault and High-Speed mode.13h: BSSx R/W Bus Speed SelectThis field is used to select bus speed mode.This field shall be set by CMD52 and the new bus speed mode is changed within8 clock cycles after the response of CMD52. Refer to Section 12 for details onswitching between default and High-Speed mode.If the card is initialized in 3.3V signaling, then BSS0 is effective. When SHS is setto 0, writing to this bit is ignored and always indicates 0. The card operates inHigh-Speed timing mode with a clock rate up to 50MHz.BSS[2:0] Bus Speed 3.3V Max. Clock Frequencyxx0b: Default Speed 25MHzxx1b: High Speed 50MHzIf the card is initialized in 1.8V signaling, then BSS[2:0] is effective. A card thatsupports UHS-I shall support High Speed mode and SHS shall be set to 1. One ofthe UHS-I modes is selected as follows.14h:SSDR50R/OBSS[2:0] Bus Speed 1.8V Max Clock Frequency000b: SDR12 25MHz001b: SDR25 50MHz010b: SDR50 100MHz011b: SDR104 208MHz100b: DDR50 50MHz101b-111b: ReservedSupport SDR50This bit indicates support of SDR50. If this bit is set to 1, SDR12 and SDR25 shallbe supported. High Speed mode in 3.3V signaling also shall be supported.Support bit of SDR500b: SDR50 is not supported1b: SDR50 is supported40

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAddr: Field Type Description16h: EAI R/W Enable Asynchronous InterruptEnable bit of Asynchronous Interrupt. When SAI is set to 0, writing to this bit isignored and always indicates 0. This bit is effective in SD 4-bit mode.EAI Interrupt Mode0b: Asynchronous Interrupt is disabled1b: Asynchronous Interrupt is enabledRFU R/O Any bit defined as Reserved for Future Use (RFU) shall be read-only and shall beread as 0.Reservedfor VendorsR/W These 16 registers are reserved for the manufacturer of the I/O card to be usedfor any operations that are defined by and specific to any vendor uniqueoperation. Information about the use of these optional registers needs to beobtained from the SDIO card maker. Reading and/or writing these registerswithout understanding the vendor's definitions may cause unexpected behavioror even damage to the card.Table 6-2 : CCCR bit Definitions42

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association6.10 Function Basic Registers (FBR)In addition to the CCCR, each supported I/O function has a 256-byte area used to allow the host to quicklydetermine the abilities and requirements of each function, enable power selection for each function and toenable software loading. The address of this area is from 00n00h to 00nFFh where n is the function number(1 to 7). This per-function area is structured as follows:Address 7 6 5 4 3 2 1 0100h Function 1CSAFunction 1supportsRFU RFU Function 1 Standard SDIO FunctionInterface Codeenable CSA101h Function 1 Extended standard SDIO Function interface code102h PS3 PS2 PS1 PS0 RFU RFU EPS SPS103h-108h Reserved for Future Use (RFU)109h-10Bh Pointer to Function 1 Card Information Structure (CIS)10Ch-10Eh Pointer to Function 1 Code Storage Area (CSA)10Fh Data access window to Function 1 Code Storage Area (CSA)110h-111h I/O block size for Function 1112h-1FFh Reserved for Future Use200h-7FFh800h-FFFhFunction 2 to 7 Function Basic Information Registers (FBR)Reserved for Future UseTable 6-3 : Function Basic Information Registers (FBR)The Individual bits and fields in the FBA are defined below in Table 6-4.Field Type DescriptionSDIOStandardFunctionInterfaceCodeR/O The SDIO Standard Function code identifies those I/O functions, which implementthe recommended standard interface as defined in a separate ApplicationSpecification. A complete and current list of assigned standard codes shall bemaintained and published in any addendums to this specification. The codesassigned to those standard interfaces at the time this specification was publishedare:FunctionSupportsCSAR/O0h: No SDIO standard interface supported by this function1h: This function supports the SDIO Standard UART2h: This function supports the SDIO Bluetooth Type-A standard interface3h: This function supports the SDIO Bluetooth Type-B standard interface4h: This function supports the SDIO GPS standard interface5h: This function supports the SDIO Camera standard interface6h: This function supports the SDIO PHS standard interface7h: This function supports the SDIO WLAN interface8h: This function supports the Embedded SDIO-ATA standard interface(Embedded SDIO-ATA shall be implemented only on devices following the"Embedded SDIO Specification").9h: This function supports the SDIO Bluetooth Type-A AMP standard interface(AMP: Alternate MAC PHY)10h-Eh: Not assigned, reserved for future useFh: This function supports an SDIO standard interface number greater than Eh. Inthis case, the value in byte 101h identifies the standard SDIO interfaces type.If this function supports and contains a Code Storage Area (CSA), this bit shall be setto 1. If this function does not support a CSA, this bit shall be cleared to 0. CSA enableis controlled by bit 7 of register n00h.43

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationField Type DescriptionFunctionCSAEnableR/W This bit controls access to the Code Storage Area for this function. If this bit is clearedto 0, then any read or write access to the CSA shall be blocked. If this bit is set to 1,then access to the CSA is allowed. This bit is cleared to 0 upon reset. If this functiondoes not support CSA (0n00h bit 6=0), then this bit shall be R/O and always read asExtendedSDIOStandardFunctioninterfacecodeR/O0.This is the extension of the SDIO Standard Function interface code. If the SDIOStandard Function interface code is greater than Eh, then this byte shall contain thecode and the standard code (100h bits 3-0) shall contain a value of Fh. If the standardcode is less than Fh, then this byte shall be 00h.SPS R/O Support Power SelectionThis bit indicates if the function has Power Selection.SPS=0: This function has no Power Selection. EPS shall be zero.SPS=1: This function has 2 power modes which are selected by EPS.This bit is effective when EMPC=1 in CCCR and PS[3:0]=0.EPS R/W Enable Power SelectionEPS=0(default): The function operates in Higher Current ModeThe maximum current for the function shall be given in TPLFE_HP_MAX_PWR_3.3VEPS=1: The function works in Lower Current ModeThe maximum current for the function shall be given in TPLFE_LP_MAX_PWR_3.3VThis bit shall be reset when IOEx=0.This bit is effective when EMPC=1 in CCCR and PS[3:0]=0.PSx R/W Power State PS[3:0]If PS[3:0] is set to 0, TPL_CODE CISTPL_FUNCE (22h) extension 01h is used andthe card power is controlled by EMPC and EPS (SDIO Version 2.00 Compatible).Power State control is defined by SDIO Version 3.00 and is effective when EMPC isset to 1 and PS[3:0] is set to larger than 0. In this case, a list of card supported powerstates is described in the TPL_CODE CISTPL_FUNCE (22h) extension 02h (PowerState Tuple).The host driver finds an affordable power in the Tuple and the number "n"(>0) is set tothis field. The total current of a card is the sum of selected current of each function.Refer to Chapter 11 about power control and Section 16.7.5 about Power StateTuple.Addresspointer toFunctionCISAddresspointer toFunctionCSADataaccesswindowto CSAR/OR/WR/WThese three bytes make up a 24-bit pointer (only the lower 17 bits are used) to thestart of the Card Information Structure (CIS) that is associated with each function.The CIS is defined in Section 6.11. A CIS is mandatory for each function on an SDIOcard. This pointer is stored in little-endian format (LSB first). This register points to theEnd of Chain tuple if the function is not supported on the card.These three bytes make up a 24-bit pointer to the desired byte in the CSA to read orwrite. After any read or write to the CSA access window register, this pointer shall beautomatically incremented by 1. If this function does not support CSA (n00h bit 6=0),then these 24 bits shall be R/O and always read as 000000h. This pointer is stored inlittle-endian format (LSB first).Any read or write to this address when the CSA is enabled (n00h bit 7=1), shall passdata to/from the byte addressed by the CSA address pointer. If this function does notsupport CSA (n00h bit 6=0), then these 8 bits shall be R/O and always read as 00h.44

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationField Type DescriptionFunction1-7 I/OBlockSizeR/W This 16-bit register sets the block size for I/O block operations for each function (1-7).If this card does not support I/O block operations (SMB=0), then this registerbecomes read-only and shall always read 0000h. The maximum block size is 2048(0800h) and the minimum is 1 (0001h). At power-up or reset, this register shall beinitially loaded with a value of 0000h. The host is responsible for setting theappropriate value for the block size supported by each function. This pointer is storedin little-endian format (LSB first).Table 6-4 : FBR bit and field definitions45

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association6.11 Card Information Structure (CIS)The Card Information Structure provides more complete information about the card and the individualfunctions. The CIS is the common area to read information about all I/O functions that exist in a card. Thedesign is based on the PC Card16 design standardized by PCMCIA. All cards that support I/O shall have acommon CIS and a CIS for each function. The CIS is accessed by reads to a fixed area as shown in Table6-5 This one area serves the card as a Common CIS and also as the storage area for each function. Thecommon area and each function have a pointer to the start of its CIS within this memory space.Address 7 6 5 4 3 2 1 0001000h- Card Common Card Information Structure (CIS) area for card common and all functions017FFFh018000h-Reserved for Future Use01FFFFhTable 6-5 : Card Information Structure (CIS) and reserved area of CIAThe valid tuples (storage structures) from the PCMCIA specification and new tuples created for SDIO aredefined in Section 16.7.6.12 Multiple Function SDIO CardsMultiple Function SDIO Cards shall have a separate set of Configuration registers for each function on thecard. Multiple Function SDIO Cards shall use a combination of a CIS common to all functions on the cardand a separate function-specific CIS specific to each function on the card. The common CIS describesfeatures that are common to all functions on the card. Each function-specific CIS describes features specificto a particular function on the SDIO Card. Functions are numbered sequentially beginning with 1.The CMD5 response indicates the total number of functions, which includes 'dummy' functions. The hostshall iterate through the CIS entries based on the CMD5 response.The ERROR status flag of an R5 response is type "E R X", (Refer to Section 5.2.1) and can indicate an errorin the previous command. Since the host software needs a method to determine which function detected theerror, a Multiple Function SDIO cards shall only return the R5 ERROR status flag in the subsequentcommand issued to the same function.6.13 Setting Block Size with CMD53The host sets the block size for a function's multiple block transfers by writing to the 16-bit Function I/O BlockSize register in the FBR (Refer to Table 6-4). The host shall not write this register using CMD53 with BlockMode set to 1. If the card detects an invalid block size before executing CMD53 with Block Mode set to 1, itshall indicate an OUT_OF_RANGE error in the current response and shall not perform data transfer. Thiswill also stop the interrupt period (Refer to Section 8.1.3)46

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association6.14 Bus State DiagramFigure 6-2 shows the Bus State Diagram for an SDIO card. It shows the bus states and their relations toSDIO commands and Suspend/Resume.Power OnInitializationStateCommandsaccepted in “INI”CMD5, CMD3CMD15Commandsaccepted in “STB”CMD3, CMD7,CMD15StandbyStateCMD3CMD7 withcorrect RCACommandsaccepted in “CMD”CMD7, CMD52,CMD53, CMD15CMD52 ResetCMD7 withincorrect RCACommandState(Dat Bus Free)BS=0CMD53 (to validfunction)FunctionResumeCMD52 ResetCMD7 with correctRCACMD53 to invalidfunctionTransferState(Dat Bus Active)BS=1Execution completeFunction SuspendCMD52 AbortCMD15 or OCRmismatchCommandsaccepted in “TRN”CMD52InactiveStateCMD53 to invalid function can be:• I/O Disable or I/O Not Ready (IORDY=0)• I/O Function number error in response• I/O Function already SuspendedFigure 6-2 : State Diagram for Bus State Machine47

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association7. Embedded I/O Code Storage Area (CSA)In order to support the concept of "Plug-and-Play" for SDIO cards, each function contained in a card mayneed to contain a block of memory for the storage of drivers and/or applications. In addition, since the sameSDIO card may be used on multiple different host platforms, several different versions of the code may beneeded for each function. One option is to store these programs in a standard SD Memory section of acombo card. Alternately, a standard access means to load the code is contained in the optional CodeStorage Area (CSA). The CSA is a separate 16MB memory area that is accessed using the CSA addresspointer and the CSA window register contained in the FBR registers. Note that each function may have itsown CSA to support it. The CSA data can be read only or R/W. The actual storage method for the CSA is nota part of this specification and left to implementers.7.1 CSA AccessIn order for the host to access a function's CSA, it first shall determine if that function supports a CSA. Thehost reads the FBR register at address 00n00h where n is the function number (1 to 7). If bit 6=1, then thefunction supports a CSA and the host enables access by writing bit 7=1. The next step is for the host to loadthe 24 bit address to start reading or writing. This is accomplished by writing the 24 bits (A23-0) to registers00n0Ch to 00n0Eh where n is the function number (1 to 7). Once the start address is written, data can beread or written by accessing register 00n0Fh, the CSA data window register. If more than 1 byte needs to beread or written, an extended I/O command (byte or block) can be performed with an OP code of 0 (fixedaddress). The address pointer shall be automatically incremented with each access to the window register,so the access will be to sequential addresses within the CSA. Once the operation is complete, the address ofthe NEXT operation shall be held in the 24 bit address register for the host to read.7.2 CSA Data FormatThe data stored in the CSA shall be structured using the FAT12/FAT16 format. This format is defined in theISO specification: ISO/IEC9293:1994 Information technology - Volume and file structure of disk cartridgesfor information interchange. This specification is also the basis for the SD memory cards. The information onthe SD memory implementation can be found in the SDA publication: Part 2 FILE SYSTEM SPECIFICATIONVersion 2.00 May 9, 2006. The actual layout of files within the CSA is undefined by this specification.The use of the CSA for program or data storage for different host types requires that the SDIO cardmanufacturer load the programs and data in a file format that may be recognized by the host. An example ofthis would be the use of a specific file name saved within a specific subdirectory that is recognized andexecuted by a particular host operating system. Such formats are specific and sometimes proprietary todifferent host implementations and operating systems.The rest of this chapter is not included in the Simplified Specification.48

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association8. SDIO InterruptsIn order to allow the SDIO card to interrupt the host, an interrupt function is added to a pin on the SDinterface. Pin number 8, which is used as DAT[1] when operating in the 4-bit SD mode, is used to signal thecard's interrupt to the host. The use of interrupt is optional for each card or function within a card. The SDIOinterrupt is "level sensitive", that is, the interrupt line shall be held active (low) until it is either recognized andacted upon by the host or de-asserted due to the end of the Interrupt Period (Refer to 8.1.2). Once the hosthas serviced the interrupt, it is cleared via some function unique I/O operation. All hosts shall provide pull-upresistors on all data lines DAT[3:0] as described in Chapter 6 of the Physical Layer Specification.8.1 Interrupt TimingThe operation of the interrupt pin is different between the SPI mode and the SD mode. The operation of theinterrupt pin is defined as follows:8.1.1 SPI and SD 1-bit Mode InterruptsIn the SPI and 1-bit SD mode, Pin 8 is dedicated to the interrupt function. Thus, in the SPI and SD 1-bitmodes there are no timing constraints on interrupts. A card in the SPI or 1-bit SD mode signals an interrupt tothe host at any time by asserting pin 8 low. The host detects this pending interrupt using a level sensitiveinput. The host is responsible for clearing the interrupt. If the SDIO card is operating in the SPI mode, theinterrupt from the card may not be asserted if the card is not selected.(CS=0). The exception to thisrequirement occurs only if the card is both capable of interrupting when not selected (the SCSI bit in theCCCR = 1), and has that feature turned on (the ECSI bit = 1). In this case, the card may assert the interruptirrespective of the state of the CS line. For more information, refer to Table 6-1.8.1.2 SD 4-bit ModeSince Pin 8 is shared between the IRQ and DAT[1] when used in 4-bit SD mode, an interrupt shall only besent by the card and recognized by the host during a specific time. The time that a low on Pin 8 shall berecognized as an interrupt is defined as the Interrupt Period.An SDIO host shall only sample the level on Pin 8 (DAT[1]/IRQ) into the interrupt detector during the InterruptPeriod. At all other times, the host interrupt controller shall ignore the level on Pin 8. Note that the InterruptPeriod is applicable for both memory and I/O operationsThe Interrupt Period timing is described as synchronous to the SD clock at the connector timing. However,when operating more than 25MB/sec data rate in SDR50, SDR104 or DDR50, the host should treat theinterrupt signal as an asynchronous input considering propagation delay from card to host.The definition of the Interrupt Period is different for operations with single block and multiple block datatransfer.8.1.3 Interrupt Period DefinitionThis section is not included in the Simplified Specification.Figure 8-1 : Continuous Interrupt Cycle8.1.4 Interrupt Period at the Data Block Gap in 4-bit SD Mode (Optional)This section is not included in the Simplified Specification.8.1.5 End of Interrupt CyclesThis section is not included in the Simplified Specification.49

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association8.1.6 Terminated Data Transfer Interrupt CycleThis section is not included in the Simplified Specification.8.1.7 Interrupt Clear TimingSince the SDIO card uses level sensitive interrupts, the host shall clear pending interrupts with an I/O read orwrite to some function unique area. In some host implementations, the sending of a CMD52 to the card ishandled by host adapter hardware while the host CPU can execute other operations. This condition mayallow an interrupt that has already been handled to re-interrupt the host if the timing of the interrupt clear isnot controlled. To prevent this condition, Any SDIO card that implements interrupts shall follow somerequired timing with respect to removing the interrupt from the DAT[1] line after the write to the functionunique area that clears the interrupt. The clearing of the interrupt can be caused by an I/O write in a functionunique method, or by a function unique I/O read. An example of clearing an interrupt using an I/O read wouldbe a function where the reading of a data register may automatically clear the data ready interrupt.The rest of this section is not included in the Simplified Specification.8.2 Asynchronous InterruptThis section is not included in the Simplified Specification because supplemental explanation will be addedin the next version.50

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association9. SDIO Suspend/Resume OperationThe procedure used to perform the Suspend/Resume operation on the SD bus is:1. The host determines which function is currently using the DAT[3:0] line(s).2. The host requests the lower priority or slower transaction to suspend.3. The host checks for the transaction suspension to complete.4. The host begins the higher priority transaction.5. The host waits for the completion of the higher priority transaction.6. The host restores the suspended transaction.If the current transaction can accept suspend and the card receives a suspend command during Read Wait,it shall accept the suspend request.The rest of this chapter is not included in the Simplified Specification.51

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association10. Timing to Pause SDIO Read OperationFor pausing a read operation, there are two methods: first is stopping the SDCLK and the second is usingthe Read Wait signal.10.1 Pause Read Operation by Stopping SDCLKThis section is not included in the Simplified Specification.10.2 Pause Read Operation by using Read WaitThe optional Read Wait (RW) operation is defined only for the SD 1-bit and 4-bit modes. The read Waitoperation allows a host to signal a card that is executing a read multiple (CMD53) operation to temporarilystall the data transfer while allowing the host to send commands to any function within the SDIO card. Todetermine if a card supports the Read Wait protocol, the host shall test 08h: SRW capability bit in the CardCapability byte of the CCCR (Refer to Table 6-1). The timing for Read Wait less than 50MHz is based on theInterrupt Period that is defined in Section 8.1If a card does not support the Read Wait protocol, the only means a host has to stall (not abort) data in themiddle of a read multiple command is to control the SDCLK. Read wait support is mandatory for the card tosupport suspend/resume.The rest of this chapter is not included in the Simplified Specification.52

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association11. Power Control11.1 Power Control OverviewThe concept of High-Power SDIO cards and its Power Control method was introduced in the SDIOSpecification Version 1.10. The Power State Control is defined by the SDIO Version 3.00 to provide moreflexible power control.The temperature requirement is also updated by SDIO Version 3.00. SDIO cards created prior to Version3.00 shall operate under the temperature requirement of Ta=85 deg.C (Ta is based on heat removal throughthe air without air blow). However, High Power SDIO cards may generate more heat and thus host deviceswill need to support another heat removal method. The Thermal Specification, which is defined by theMechanical Addenda Version 3.00, specifies the Card Case Temperature (Tc) as the new temperaturerequirement and the concept of heat removal method through materials (Refer to the Mechanical AddendaVersion 3.00 for more details). The concept of the Thermal Specification is also applied to SDIO.Power Control supports following two features:• High-Power SupportSDIO cards created prior to Version 1.10 of the SDIO Specification were limited to a maximum current of200mA at any time, irrespective of the number or types of functions supported. With the creation of wirelesscommunication devices in the SDIO form factor, a need was seen to provide more current to accommodatethe higher power requirements of some SDIO cards. Since backward compatibility is a primary concern forany changes made to this specification, a method was chosen to prevent a high-power card from drawingexcessive amounts of current from hosts designed to only support the SDIO Version 1.00 cards. The MasterPower Control prevents excessive current damage to the host when a high-power cards to be inserted intoany host. It is important to note that there exists the possibility of trying to use a card that requires high-powerin a standard power host and having that card fail to operate. The Master Power Control is supported on aper card basis and available to the host in the CCCR. A high-power card may have a mix of both high andstandard power functions. Support of the Master Power Control is mandatory for the SDIO Version 3.00Card, which has an operating mode more than 720mW (3.6V x 200mA).• Power Tuning SupportSupport of Power Tuning capability is useful for the hosts. For example, even though the power supplycapability is limited depending on the hosts, support of the Power Tuning enables the widest range of hostsupport for high-power cards. Operating in lower power mode increases operation time.Two types of Power Tuning can be used in SDIO Version 3.00 and higher.(1) Power SelectionSupport of Power Selection is optional. The two-level Power Selection is available by EPS in FBR (perfunction basis) for an SDIO Card supporting 2.7V-3.6V Power supply range. The maximum current of acard is up to 500mA and the card also needs to satisfy the temperature requirement of Ta=85 deg.C.(2) Power State ControlSupport of Power State Control is optional. Up to 15 power states can be selected by PS[3:0] in FBR(per function basis). The temperature requirement is defined by Tc basis and the maximum power of acard is restricted by Tc (Refer to Section 11.2.5). Usage of the Power State is recommended rather thanusing EPS due to the flexibility of power control.11.2 Details of SDIO Power Control11.2.1 Master Power ControlSDIO version 1.10 cards indicate their support for the power control functions with the SMPC (SupportMaster Power Control) bit in the CCCR (Refer to Section 6.9). Hosts enable the card's power controlfunctions with the EMPC (Enable Master Power Control) bit.53

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationSMPC can be set to 0 if the card maximum power is less than 720mW (3,6V x 200mA) and Power Selection(Refer to Section 11.2.2) is not supported. A SDIO version 1.10 card which has SMPC set to 1 shall maintainbackward compatibility when EMPC is set to 0. A SDIO version 1.0 host may not be aware of EMPC, whichwill remain 0 (its default state).In the case where EMPC is set to 0, the card total power shall not exceed 720mW (3,6V x 200mA). Functionsthat exceed 720mW shall not set IORx to 1 and TPLFE_OP_MAX_PWR shall be set to 0. If a multi-functioncard's total power exceeds 200mA the card shall not set all IORx to 1, even if all IOEx are set to 1. Some ofthe functions' IORx can be set to 1 as long as the card's total current is less than 720mW. If the host tries toenable a function (IOEx =1) that will cause the card's total current to exceed 200mA, the card shall disable(IORx=0) one or more functions to keep the card's total current less than 200mA. Which functions areenabled is implementation dependant.In the case where EMPC is set to 1, the card power can exceed 720mW. SDIO Cards should be designed,where possible, to not require the maximum current, thus functioning in as many hosts as possible withsufficient power. One of the following Power Tuning features should be supported.11.2.2 Power SelectionIf Power State Control is disabled (PS[3:0]=0 in FBR), Power Selection is supported by the SPS bit (SupportPower Selection) in the FBR and the EPS bit (Enable Power Selection) in the FBR.Power Selection defines two power modes for a function: Lower Current Mode and Higher Current Mode. Acard implementing Power Selection gives the host the choice between these two power modes. Thesemodes can be used for functions, which can operate in full performance (EPS=0: Higher Current Mode) orreduced performance (EPS=1: Lower Current Mode).The Power Selection can be applied to an SDIO Card supporting 2.7V-3.6V Power supply range becausethe High Power Tuple is defined only for 3.3V supply voltage.11.2.3 Power State ControlThe Power State Control provides more flexible power control than the Power Selection. A SDIO functioncan define up to 15 power states that are specified by the Power State Tuple. The tuple consists of a list ofpower consumption of each state. The Host chooses an affordable power from the Tuple and sets a powerstate number to PS[3.0] in FBR. The card shall operate below the power specified in the Power State Tuplecorresponding to the power state number. Since the Power State Control is on a per function basis, the totalpower of the card is calculated by the sum of the power of enabled functions. In case of Combo Card, addingthe current of a memory portion is needed that is indicated by CMD6. If a host cannot provide the estimatedtotal card power, host needs to disable some of the functions or select smaller power state. There is anotherrequirement that the total power of the card shall be smaller than that calculated from the maximum cardpower restricted by Tc (Refer to Section 11.2.5).The Power State can be applied to not only single voltage device but also multiple voltages device.11.2.4 High-Power TuplesSix tuple fields are defined in Version 1.10 for each function tuple.• Average power required when Master Power Control is not enabled (TPLFE_SP_AVG_PWR_3.3V)• Peak power required when Master Power Control is not enabled (TPLFE_SP_MAX_PWR_3.3V)• Average power required in Higher Current Mode (TPLFE_HP_AVG_PWR_3.3V)• Peak power required in Higher Current Mode (TPLFE_HP_MAX_PWR_3.3V)• Average power required in Lower Current Mode (TPLFE_LP_AVG_PWR_3.3V)• Peak power required in Lower Current Mode (TPLFE_LP_MAX_PWR_3.3V)Each tuple field is a 16 bit value with a 1mA/step resolution. This allows a value of 0 to 65,535 mA to be used.Current varies depending on the voltage. These tuple fields are defined as a 3.1-3.5V or 2.7-3.6V range.54

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationA Power State Tuple is defined in version 3.00 for each function tuple.• Maximum power at XX Power State for 3.3V device (TPLFE_PS_XX)Each tuple field is a 16 bit value with a 1mW/step resolution. This allows a value of 0 to 65,535 mW to beused. The Power State is regardless of voltages and can be applied to a multiple voltages device.Table 11-1 shows which tuples a host shall refer to depending on the host version and the settings of EMPC,EPS and PS[3:0].Host EMPC PS[3:0] EPS Reference TPLsCommentsVer. (CCCR) (FBR) (FBR)1.00 0 0h X TPLFE_OP_MIN_PWRTPLFE_OP_AVG_PWRFor SDIO Version 1.00 Host up to200mA 3.3VTPFLE_OP_MAX_PWR1.10,2.000 0h X TPLFE_SP_AVG_PWR_3.3VTPLFE_SP_MAX_PWR_3.3VSame as TPLFE_OP_AVG_PWRSame as TPFLE_OP_MAX_PWRand3.00110h0h01TPLFE_HP_AVG_PWR_3.3VTPLFE_HP_MAX_PWR_3.3VTPLFE_LP_AVG_PWR_3.3VTPLFE_LP_MAX_PWR_3.3VNon zero value shall be set whenSMPC=1.Non zero value shall be set whenSMPC=1 and SPS=13.00 1 Non 0 X TPLFE_PS_XX Multiple voltages device can besupported.Table 11-1 : Reference of Tuples Depends on Host VersionIf an SDIO card is set to SMPC to 1 it shall implement the CISTPL_FUNCE Tuple for Functions 1-7(Extended Data 01h). A Non-zero value shall be set in TPLFE_SP_AVG_PWR_3.3V,TPLFE_SP_MAX_PWR_3.3, TPLFE_HP_AVG_PWR_3.3V and TPLFE_HP_MAX_PWR_3.3V. If the cardis set to SPS to 1, a non-zero value shall be set in TPLFE_LP_AVG_PWR_3.3V andTPLFE_LP_MAX_PWR_3.3V.TPLFE_SP_AVG_PWR_3.3V and TPLFE_SP_MAX_PWR_3.3V should be set to the same value asTPFLE_OP_AVG_PWR and TPLFE_OP_MAX_PWR respectively.11.2.5 The Maximum Card Power Restricted by TcThe temperature specification of a default power consumption card up to 720mW (3.6Vx200mA) wasspecified by the ambient temperature Ta=85 deg.C and heat of the card is supposed to be removed throughthe air.To use an SDIO card more than 720mW power consumption, Version 3.00 Host should support a heatremoval method though materials specified by the Mechanical Addenda Version 3.00. According to thethermal specification defined in the Mechanical Addenda Version 3.00, Card Surface Temperature (Tc) isdefined as the temperature requirement for a high-power supported host and card.The maximum operating power of a card is restricted by the Tc the host supports. The lower Tc environmentenables the card to consume more power. The list of card operable conditions is added optionally in theCISTPL_FUNCE Tuple for Function 0 (Common) that consists of the pairs of Tc and card power. Each pairindicates the card maximum consumable power under the Tc (Refer to Section 16.7.3 for more details aboutthe tuple). The list is required for an SDIO card more than 720mW power consumption.The High Power Version 3.00 SDIO Card shall include the maximum operable power at the Tc=80 deg.C inthe Tuple for Function 0 and shall include sections of power states less than or equal to 1440mW in thePower State Tuple so that UHS-I supported host (3.6V 400mA Tc=80 deg.C) can support the SDIO card.Presuming that host has the two capabilities: Tc the host supports and the maximum removable power tokeep the card surface temperature below the Tc. The Host scans the Tuple for Function 0 and compares the55

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Associationhost and card capabilities, and then finds the maximum consumable power of the card under the Tc hostsupports.For example, when a SDIO card, which indicates 1800mW (3.6Vx500mA) consumable power atTc=80deg.C, is inserted to the host (3.6V 400mA at Tc=80 deg.C), the host needs to select less than1440mW (3.6Vx 400mA) Power State to use the SDIO card. If the host supports heat removal of 1800mW atTc=80 deg.C, the card can be used at the maximum power by selecting 1800mW Power State.For Multiple Functions Card or Combo Card, host needs to estimate the total card power by adding thepower of memory and the power of enabled functions and check whether the total card power shall be lessthan the maximum consumable power of the card. If not, the host needs to reduce the total card power bycontrolling the Current Limit of a memory, the Power State of each function or disabling a part of functions.11.3 Power Control Support for the SDIO Host11.3.1 Version 1.10 HostThe following are requirements for a version 1.10 host:• The host shall recognize new Power Control registers and tuples as defined in SDIO SpecificationVersion 1.10.• Power Control bits (SMPC, EMPC) in CCCR• Power Selection bits (SPS, EPS) in FBR• High-Power Tuples (Refer to Table 16-8)• The host shall know its own power supply ability• The host shall have the ability to manage power by calculating maximum current shown in the tuplesand control EMPC, EPS and IOEx not to exceed total current that the host can supply. If the host doesnot have enough power to use the card, the host shall not enable the card.11.3.2 Version 3.00 HostThe following are requirements for a version 3.00 host which supports over 720mW:• The host needs to recognize new Power Control registers and tuples as defined in SDIO SpecificationVersion 3.00.• Power Control bits (SMPC, EMPC) in CCCR• Power Selection bits (SPS, EPS) in FBR• Power State bits (PS[3:0]) in FBR• The Maximum Card Power restricted by Tc (Refer to Section 11.2.5)• High-Power Tuples (Refer to Table 16-8)• Power State Tuples (Refer to Table 16-12)• The host shall know its own power supply ability and heat removal ability of Tc• The host shall have the ability to manage power by calculating maximum current shown in the tuplesand control EMPC, EPS, PS[3:0] and IOEx not to exceed total current that the host can supply. The hostalso needs to manage to satisfy the maximum card power restricted by Tc. If the host does not haveenough power to use the card, the host shall not enable the card.Application Note:Most card connectors limit the maximum current at 500mA. A card slot that can support more than500mA will require a special connector to handle the higher current.Host systems using an Embedded SDIO device may need to support a specific Tc requirement asdefined by the device manufacturer. Since Embedded SDIO devices usually do not use normal cardconnectors, a heat removal method is easier to support than on a removable card and currentlimitations are also easier to contend with.56

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association12. High-Speed ModeHigh-Speed mode increases the bus clock rate to 50MHz and the SD bus throughput from 12.5MB/sec to25MB/sec. SDIO and combo cards may also support High-Speed mode.12.1 SDIO High-Speed ModeSDIO version 1.20 cards indicate their support for High-Speed mode with the SHS (Support High-Speed) bitin the CCCR (Refer to section 6.9). Hosts switch between default and High-Speed mode with the EHS(Enable High-Speed) bit in the CCCR by CMD52. Following a command to set or clear EHS, cards shallswitch speed mode within 8 clocks after the end bit of the corresponding response.When switching from default to High-Speed mode the host can try to set EHS without first checking SHS.The host issues CMD52 in RAW mode, setting EHS to one, and after getting the response of CMD52 thehost checks SHS and EHS. If SHS=0 or EHS=0, the command will be ignored and the card is still in defaultmode. If SHS=1 and EHS=1, the card is in High-Speed Mode.12.2 Switching Bus Speed Mode in a Combo CardA combo card that supports High-Speed shall support it for both memory and IO. Two bus speed switchcommands are defined; SD memory command (CMD6) and SDIO command (EHS in CCCR is changedusing CMD52).A part of this section is not included in the Simplified Specification.When one bus speed switch commands is executed successfully, the card switches the card bus speedmode. If two bus speed switch commands are executed in turn (to the same bus speed mode), only the firstsuccessful command is effective to switch bus speed mode.The host needs to check the success of executing a bus speed switch command and then the host canswitch the host bus speed mode to the same one.Success of switching bus speed mode is determined by checking the receipt of a good response and theresult of switching the bus speed mode is the same as the switch requested.The status of current bus speed mode is read by the bus speed switch commands. For example, when thebus speed mode is switched by CMD6, the result can be read from EHS. If switching using the RAW mode ofCMD52 has failed, there can be one of two responses. First is no response with an illegal command error.The second is that CMD52 is accepted and the status of RAW mode indicates EHS is not changed.A reset of either the memory or IO portion of a combo card will also reset both portions to default speedmode. Within 8 clocks after the response of a reset by CMD52 (write to RES in CCCR) or CMD0 the cardshall change the speed mode to default speed mode.Note that when changing the bus speed the host bus driver should treat a bus speed change request fromany driver as an atomic operation. The host should mask interrupts and not issue any command to the carduntil the bus speed change is complete.If a combo card supports the Lock/unlock function, a locked card cannot change bus speed mode. A lockedcard indicates an illegal command error to a bus speed switch command. The host needs to unlock the cardby CMD42 before changing bus speed. It also implies that a host should not change bus speed mode duringinitialization before managing a locked card.57

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association13. SDIO Physical Properties13.1 SDIO Form FactorsThe SDIO definition encompasses different form factors:• Full-Size SDIO - compatible with host sockets designed for SD memory cards• miniSDIO - compatible with host sockets designed for miniSD memory cards• microSDIO - compatible with host sockets designed for microSD memory cards13.2 Full-Size SDIOThe SDIO card is compatible with host sockets designed for SD memory cards. In addition, the SDIO cardscan be extended to allow for external connectors, antennas etc. With the exception of the write protectswitch, all SDIO cards shall meet the mechanical specifications described in the Standard Size SD CardMechanical Addendum for that portion of the card that is not extended.The rest of this section is not included in the Simplified Specification.13.3 miniSDIOThe miniSDIO card is compatible with host sockets designed for miniSD memory cards. In addition, theminiSDIO cards can be extended to allow for external connectors, antennas etc. All miniSDIO cards shallmeet the mechanical specifications described in miniSD Card Addendum.When a miniSDIO card is inserted into a miniSD to SD memory card adaptor, and plugged-into an SDIO hostslot, it shall appear to the host as an SDIO card.The rest of this section is not included in the Simplified Specification.13.4 microSDIOThe microSDIO card shall be compatible with host sockets designed for microSD memory cards. AllmicroSDIO cards shall meet the mechanical specifications described in microSD Card Addendum.Mechanical Extensions are not supported. microSDIO shall be the same as microSD memory card formfactor.58

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association14. SDIO Power14.1 SDIO Card Initialization VoltagesSDIO Specification Version 2.00 eliminated the voltage range 2.0-2.7V for basic communication because thePhysical Layer Specification Version 2.00 eliminates it. SDIO cards follow the same voltage and currentrequirements as SD memory cards. This means that an SDIO or combo card shall be used at an operatingvoltage range of 2.7 to 3.6V. Hosts shall not supply the voltage range 2.0-2.7V for basic communication tothe SDIO Version 2.00 or later cards.14.2 SDIO Power ConsumptionThe SDIO cards are intended to operate in mobile devices that have limited power sources available.Because the host's battery life may be significantly reduced if the SDIO card draws excessive power, aprimary goal of SDIO designers should be low power. By reducing power consumption to a minimum, Hostbattery life and consumer satisfaction will be enhanced. The following power data represents the maximumthat a SDIO card may draw. It is important for designers to note that a low power host may reject any SDIOcard that identifies itself as drawing more power that the host is willing to supply, thus lower power cards mayhave a competitive advantage in the market.The rest of this chapter is not included in the Simplified Specification.59

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association15. Inrush Current LimitingThis chapter is not included in the Simplified Specification.60

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association16. CIS Formats16.1 CIS Reference DocumentThe CIS used by SDIO is based directly upon the metaformat specification used by PCMCIA and CompactFlash. For details on the metaformat, refer to:PC Card StandardVolume 4Metaformat SpecificationPublished by:PCMCIA (Personal Computer Memory Card International Association)2635 North First Street, Suite 218 per the PCMCIA .org websiteSan Jose, CA 95134 USA+1-408-433-2273+1-408-433-9558 (Fax)www.pcmcia.org16.2 Basic Tuple Format and Tuple Chain StructureThe Card Information Structure is one or more chains (or linked lists) of data blocks or tuples. The basicformat of tuples is shown in Table 16-1.Byte 7 6 5 4 3 2 1 000hTPL_CODE Tuple code: CISTPL_xxx01h TPL_LINK Offset to next tuple in chain. This is the number of bytes in the tuple body. (n)02h..The tuple body. (n bytes)(n+2)Table 16-1 : Basic Tuple FormatByte 0 of each tuple contains a tuple code. A tuple code of FFh is a special mark indicating that there are nomore tuples in the chain. There are 2 tuples with only a tuple code, the CISTPL_NULL and the CISTPL_END(Refer to Table 16-2). These tuples do not have any additional bytes. For all other tuples, byte 1 of each tuplecontains a link to the next tuple in the chain. If the link field is 0, then the tuple body is empty. If the link fieldcontains FFh, then this tuple is the last tuple in its chain. There are two ways of marking the end of a tuplechain for SDIO cards: a tuple code of FFh, or a tuple link of FFh. The use of an FFh link value is allowed inSDIO cards, but it is recommended to use the End of Chain tuple. System software shall use the link field tovalidate tuples. No SDIO card tuple can be longer than 257 bytes: 1 byte TPL_CODE + 1 byte TPL_LINK +FFh byte tuple body (and this 257 byte tuple ends the chain). Some tuples provide a termination or stop bytethat marks the end of the tuple. In this case, the tuple can effectively be shorter than the value implied by itslink field. However, software shall not scan beyond the implied length of the tuple, even if a termination bytehas not been seen.16.3 Byte Order Within TuplesWithin tuples, all multi-byte numeric data shall be recorded in little-endian order. That is, the least-significantbyte of a data item shall be stored in the first byte of a given field. Within tuples, all character data shall bestored in the natural order. That is, the first character of the field shall be stored in the first byte of the field.Fixed-length character fields shall be padded with null characters, if necessary.61

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association16.4 Tuple VersionWith the introduction of SDIO Specification Version 1.10, a different format for the tuple information ispossible based on the changes made by each specification revision. These changes could be added fields ina tuple or entirely new tuples. In order to maintain backward compatibility, new data fields are added afterexisting fields in order to maximize backward compatibility. It is the responsibility of the host program that isscanning the tuple chain (sometimes called "walking the tuples") to first determine the SDIO specificationversion that the card was designed to. The program shall be designed to anticipate that SDIO cards will beencountered that are built to a later version of the specification. This requires the program to ignore theadditional data existing in SDIO cards built to a later specification. Specifically, the program shall first readthe SDIO specification version that the card was designed to meet from the SDIOx field in the CCCR area. Ifthe version is less than or equal to the version of the tuple scan program, then the program shall know andproperly decode all tuple information. If the card version is greater than the scan program's version, the scanprogram may need to ignore additional information fields or tuples. The unknown tuples can be ignored bysimply skipping those tuples with unrecognized codes. Skipping is accomplished by using the TPL_LINKfield (always the second byte) to jump over the unknown tuple. In a similar manner, the additional data fieldsin tuples should be ignored using the link field. For example, if a scan program is expecting 15h bytes of dataand the TPL_LINK field indicates a size of 19h bytes, the scan program should ignore and skip over the last4 bytes of data.16.5 SDIO Card MetaformatUnlike the PCMCIA card, the SDIO card has multiple CIS areas. There is a common CIS for the entire cardand a CIS assigned to each function. Because of the multiple CIS areas, the SDIO card does not need tosupport the CISTPL_LONGLINK_MFC tuple or the CISTPL_LINKTARGET as described in Section 2.3.6 ofthe PCMCIA spec. Table 16-2 lists the tuple codes supported by SDIO cards. The type field indicates if atuple is Optional (O), Mandatory (M), Recommended (R), or not applicable (n/a) for the common (function 0)tuple and for each function (1-7) supported by the card. For more details on each tuple, refer to the PCMCIAmetaformat specification section referenced.Code Name Description PCMCIAReference62TypeCommonTypeFunction00h CISTPL_NULL Null tuple 3.1.9 O O10h CISTPL_CHECKSUM Checksum control 3.1.1 R R15h CISTPL_VERS_1 Level 13.2.10 O Oversion/product-information16h CISTPL_ALTSTR The Alternate Language 3.2.1 O OString Tuple20h CISTPL_MANFID Manufacturer Identification 3.2.9 M OString Tuple21h CISTPL_FUNCID Function Identification Tuple 3.2.7 n/a M22h CISTPL_FUNCE Function Extensions 3.2.6 n/a M80h-8Fh Vendor Unique Tuples None O O91h CISTPL_SDIO_STD Additional information forfunctions built to supportapplication specifications forstandard SDIO functions.6.1.2 n/a M 1 :StandardFunctionO 1 :Non-StandardFunction92h CISTPL_SDIO_EXT Reserved for future use with 6.1.3 n/a n/aSDIO devices.FFh CISTPL_END The End-of-chain Tuple 3.1.2 M MTable 16-2 : Tuples Supported by SDIO CardsNote 1: the use of CISTPL_SDIO_STD is mandatory for all functions that claim to support a SDIO standard

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Associationinterface specification (Refer to Section 1.4). If the function does not support a standard SDIO interface, thistuple should be used with a value of 0.16.6 CISTPL_MANFID: Manufacturer Identification String TupleThe manufacturer identification tuple contains information about the manufacturer of a SDIO Card. Twotypes of information are provided: the SDIO Card's manufacturer and a manufacturer card number. Thistuple shall be present in the card common CIS.This should also be present in each function's CIS. This allows a function to override the card commonmanufacturer information so the driver can take advantage of unique features.Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_MANFID (20h)01h TPL_LINK Link to next tuple (at least 4)02h-03hTPLMID_MANF SDIO Card manufacturer code04h-05hTPLMID_CARD manufacturer information (Part Number and/or Revision)Table 16-3 : CISTPL_MANFID: Manufacturer Identification TupleThe TPLMID_MANF field identifies the SDIO Card's manufacturer. New codes are assigned by bothPCMCIA and JEIDA. The first 256 identifiers (0000h through 00FFh) are reserved for manufacturers whohave JEDEC IDs assigned by JEDEC Publication 106. Manufacturers with JEDEC IDs may use theireight-bit JEDEC manufacturer code as the least significant eight bits of their SDIO Card manufacturer code.In this case, the most significant eight bits shall be zero (0). For example, if a JEDEC manufacturer code is89h, their SDIO Card manufacturer code is 0089h. If a SDIO card manufacturer does not currently have aTPLMID_MANF assigned, one can be obtained at little or no cost from the PCMCIA. The TPLMID_CARDfield is reserved for the use of the SDIO Card's manufacturer. It is anticipated that the field will be used tostore card identifier and revision information.16.7 SDIO Specific ExtensionsSDIO cards use two to four tuples to provide additional information about the card (common) and eachfunction. The first is the Function ID tuple. The changes for SDIO are detailed in the next sections.16.7.1 CISTPL_FUNCID: Function Identification TupleTo identify an SDIO card, the CISTPL_FUNCID tuple shall exist in all CIS areas. This means there shall be aCISTPL_FUNCID in the common CIS space chain and one in each function's CIS space chain. The format ofthis tuple is shown inByte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_FUNCID (21h)01hTPL_LINK Link to next tuple (02h)02hTPLFID_FUNCTION Card function code (0Ch)03h TPLFID_SYSINIT System initialization bit mask. (Not used, set to 00h)Table 16-4 : CISTPL_FUNCID TupleThe function identification tuple contains information about the functionality provided by an SDIO Card.Information is also provided to enable system utilities to decide if the SDIO Card should be configured duringsystem initialization. Since additional function specific information is available, one or more functionextension tuples follow this tuple. The TPLFID_FUNCTION field contains an identifier assigned by PCMCIA(0Ch) to identify the SDIO device class.16.7.2 CISTPL_FUNCE: Function Extension Tuple63

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationThe CISTPL_FUNCE tuple provides standard information about the card (common) and each individualfunction. There shall be one CISTPL_FUNCE in each function's CIS immediately following theCISTPL_FUNCID tuple. The format of the CISTPL_FUNCE is shown in Table 16-5.Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_FUNCE (22h)01hTPL_LINK Link to next tuple (Refer to following sections)02h03h-nTPLFE_TYPE Type of extended data (Refer to following sections)TPLFE_DATA Function information (Refer to following sections)Table 16-5 : CISTPL_FUNCE Tuple General StructureThere are two versions of the CISTPL_FUNCE tuple, one for the common CIS (function 0) and a versionused by the individual function's CIS (1-7). Both types are described below.16.7.3 CISTPL_FUNCE Tuple for Function 0 (Extended Data 00h)The CISTPL_FUNCE tuple gives the host common information about the card. There shall be only one ofthese tuples, located in the CIS for function 0 following the CISTPL_FUNCID. The format of this tuple isshown in Table 16-6.The optional fields are added in the SDIO Version 3.00 to indicate the list of the Card Maximum Powerrestricted by Card Case Temperature (Tc). If the card maximum power is less than 720mW (3.6V x 200mA),these optional field is not required and TPL_LINK Link to next tuple is set to 04h.Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_FUNCE (22h)01hTPL_LINK Link to next tuple (2n+4)02hTPLFE_TYPE Type of Extended Data (00h)03h-04hTPLFE_FN0_BLK_SIZE05hTPLFE_MAX_TRAN_SPEED06hTPLFE_TC_0107hTPLFE_CP_0108hTPLFE_TC_0209hTPLFE_CP_02......... .........2n+4 TPLFE_TC_n2n+5 TPLFE_CP_nTable 16-6 : TPLFID_FUNCTION Tuple for Function 0 (Common)The fields in this tuple have the following definition:FieldDescriptionTPLFE_FN0_BLK_SIZE This is both the maximum block size and byte count that function 0 cansupport. A value of zero is not valid and shall not be used.TPLFE_MAX_TRAN_SPEED This byte indicates the maximum transfer rate per one data line duringdata transfer. This value applies to all functions in the SDIO card. Thisvalue shall be 25 Mb/Sec (32h) for all Full-Speed SDIO cards. Theminimum value for Low-Speed SDIO cards shall be 400 Kb/Sec (48h).The format is identical to the TRAN_SPEED value stored in the CSD ofSD memory cards. The maximum data transfer rate is coded according tothe following method:Bits 2:0 contain the transfer rate unit coded as follows:0=100kbit/s, 1=1Mbit/s, 2=10Mbit/s, 3=100Mbit/s, 4... 7=reservedBits 6:3 contain the time value codes as follows:0=reserved, 1=1.0, 2=1.2, 3=1.3, 4=1.5, 5=2.0, 6=2.5, 7=3.0, 8=3.5,64

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association9=4.0, A=4.5, B=5.0, C=5.5, D=6.0, E=7.0, F=8.0Bit 7 is reserved and shall be zeroA Combo Card shall support 25MHz clock (32h)SDR104 supported SDIO Card sets TRAN_SPEED to 2Bh (up to200Mbit/sec) SDR50 and DDR50 supported SDIO Cards setTRAN_SPEED to 0Bh (up to 100Mbit/sec),TPLFE_TC_nThis 8-bit value indicates the Card Case Temperature (Tc) required for thecard heat removal and the range is from 1 to 255 deg.C in 1 deg.C step.The number "n" indicates the number of Tc and the maximum power pairsin this tuple. As the power is inverse proportion to Tc, The larger "n" fieldshall indicate the smaller temperature value. If a value is set to 0, the hostshould ignore and skip it. At least 80 deg.C is required in this tuple.TPLFE_CP_nThis 8-bit value indicates the maximum card power that is restricted by thecorrespondent Tc and the range is from 10 to 2550 mW in 10mW step.The number "n" indicates the number of Tc and the maximum power pairsin this tuple. The larger "n" field shall indicate the larger power value. If avalue is set to 0, the host should ignore and skip it.Table 16-7 : TPLFID_FUNCTION Field Descriptions for Function 0 (common)16.7.4 CISTPL_FUNCE Tuple for Function 1-7 (Extended Data 01h)The CISTPL_FUNCE tuple gives the host common information about each individual function on aper-function basis. There shall be one of these tuples, located in the CIS for each function following theCISTPL_FUNCID.Extended Data 01h is defined for Power Control using EMPC, SMPC in CCCR and SPS, EPS in FBRinstead of by the power state control (PS[3:0]=0h).The format of this tuple is shown in Table 16-8.Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_FUNCE (22h)01hTPL_LINK Link to next tuple (2Ah)02hTPLFE_TYPE Type of Extended Data (01h)03hTPLFE_FUNCTION_INFO04hTPLFE_STD_IO_REV05h-08hTPLFE_CARD_PSN09h-0ChTPLFE_CSA_SIZE0DhTPLFE_CSA_PROPERTY0Eh-0FhTPLFE_MAX_BLK_SIZE10h-13hTPLFE_OCR14hTPLFE_OP_MIN_PWR15hTPLFE_OP_AVG_PWR16hTPLFE_OP_MAX_PWR17hTPLFE_SB_MIN_PWR18hTPLFE_SB_AVG_PWR19hTPLFE_SB_MAX_PWR1Ah-1BhTPLFE_MIN_BW1Ch-1DhTPLFE_OPT_BW1Eh-1FhTPLFE_ENABLE_TIMEOUT_VAL20h-21hTPLFE_SP_AVG_PWR_3.3V22h-23hTPLFE_SP_MAX_PWR_3.3V65

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association24h-25hTPLFE_HP_AVG_PWR_3.3V26h-27hTPLFE_HP_MAX_PWR_3.3V28h-29hTPLFE_LP_AVG_PWR_3.3V2Ah-2BhTPLFE_LP_MAX_PWR_3.3VTable 16-8 : TPLFID_FUNCTION Tuple for Function 1-7 (High Power Tuple)The fields in this tuple have the following definition:FieldTPLFE_FUNCTION_INFOTPLFE_STD_IO_REVTPLFE_CARD_PSNTPLFE_CSA_SIZETPLFE_CSA_PROPERTYTPLFE_MAX_BLK_SIZETPLFE_OCRTPLFE_OP_MIN_PWRTPLFE_OP_AVG_PWRTPLFE_OP_MAX_PWRDescriptionBit significant information about the Function The bits are defined inTable 16-10This 8-bit value contains the version level of the ApplicationSpecification for Standard SDIO Functions that this function supports.The format is x.y where x is the major version (4-bits) and y is the minorversion level. For example if the version is 2.4 the value would be 24h. Ifthis function does not support an SDIO standard function, the valueshall be 00h.The Product Serial Number is a 32 bit unsigned binary integer. Supportof a serial number is optional, if there is no serial number, this field shallbe 00000000h While a unique serial number is not required for alldevices, it is strongly recommended that SDIO card vendors place aunique serial number in this field to assist the operating systems isdifferentiating multiple cards of the same type. Also note that someApplication Specifications for Standard SDIO Functions require aunique serial number in this field. The individual ApplicationSpecification will indicate if support of this field is mandatory.Size of the CSA space available for this function in bytesThis byte contains flags identifying properties of this function's CSA.The bits are defined in Table 16-11.This is both the maximum block size and byte count that this functioncan support. A value of zero is not valid and shall not be used.This is the OCR value for this function. The format is identical to the32-bit OCR format used by SD memory devices. For more details, referto Section 5.1 of the Physical Layer Specification.This is the minimum current at 2.7V operating voltage, in mA requiredby this function when operating. This value is valid for all voltagessupported by this function. If the required current exceeds 200mA, thisvalue shall be zero.This is the average current at 3.3V operating voltage, in mA, requiredby this function when operating. This value is valid for all voltagessupported by this function. If the required current exceeds 200mA, thisvalue shall be zeroThis is the maximum (peak) current at 3.6V operating voltage, in mA,required by this function when operating. This value is valid for allvoltages supported by this function. If the required current exceeds200mA, this value shall be zero66

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationTPLFE_SB_MIN_PWRTPLFE_SB_AVG_PWRTPLFE_SB_MAX_PWRTPLFE_MIN_BWTPLFE_OPT_BWTPLFE_ENABLETIMEOUT_VALTPLFE_SP_AVG_PWR_3.3VTPLFE_SP_MAX_PWR_3.3VTPLFE_HP_AVG_PWR_3.3VTPLFE_HP_MAX_PWR_3.3VTPLFE_LP_AVG_PWR_3.3VThis is the minimum current, in mA, required by this function when inthe standby condition. If this function does not support standby, thisvalue shall be 00h. The method to place this function in the standbystate and the capabilities it has while in standby are vendor defined.This value is valid for all voltages supported by this function. Note thatthis value is valid only for standard power SDIO cards or high-powercards when EMPC is 0. With an 8-bit field, the range is from 0 to 254mA. A value of 255 (FFh) is used to indicate a value of 255mA orgreater.This is the average current, in mA, required by this function when in thestandby condition. If this function does not support standby, this valueshall be 00h. The method to place this function in the standby state andthe capabilities it has while in standby are vendor defined. This value isvalid for all voltages supported by this function. Note that this value isvalid only for standard power SDIO devices cards or high-power cardswhen EMPC is 0. With an 8-bit field, the range is from 0 to 254 mA. Avalue of 255 (FFh) is used to indicate a value of 255mA or greater.This is the maximum current, in mA, required by this function when inthe standby condition. If this function does not support standby, thisvalue shall be 00h. The method to place this function in the standbystate and the capabilities it has while in standby are vendor defined.This value is valid for all voltages supported by this function. Note thatthis value is valid only for standard power SDIO devices cards orhigh-power cards when EMPC is 0. With an 8-bit field, the range is from0 to 254 mA. A value of 255 (FFh) is used to indicate a value of 255mAor greater.This is the minimum data transfer bandwidth, in KB/sec, needed by thisfunction to successfully operate. If this function has no minimumnecessary bandwidth, these bytes shall be 0000h.This is the data transfer bandwidth, in KB/sec, needed by this functionto function at an optimum level. If this function has no optimumbandwidth, these bytes shall be 0000h.(Added in SDIO Rev 1.1) This 16-bit value indicates the function'srequired time-out value for coming ready after being enabled. Thisper-function value indicates the time a host should wait from assertingIOEx until expecting the card to indicate ready by asserting IORx.Different SDIO functions take different amounts of time to becomeready after being enabled due to different internal initializationrequirements. The required time-out limit is in 10mS steps, allowing arange of 0-655.35 seconds. If the cards required no time-out, this fieldshall be set to 0000h.This value is the same as that of TPLFE_OP_AVG_PWR.This value is the same as that of TPLFE_OP_MAX_PWR.This 16-bit value indicates the average current, in mA, required by thisfunction when operating in the Higher Current Mode (EMPC=1 &EPS=0). This value indicates a current range from 1 to 65535 mA.This 16-bit value indicates the peak current, in mA, required by thisfunction when operating in the Higher Current Mode. This valueindicates a current range from 1 to 65535 mA.This 16-bit value indicates the average current, in mA, required by thisfunction when operating in the Lower Current Mode (EMPC=1 &EPS=1). This value indicates a current range from 1 to 65535 mA67

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationTPLFE_LP_MAX_PWR_3.3V This 16-bit value indicated the maximum (peak) current, in mA, requiredby this function when operating in the Lower current mode (EMPC=1 &EPS=1). This value indicates a current range from 1 to 65535 mATable 16-9 : TPLFID_FUNCTION Field Descriptions for Functions 1-7Bit 7 6 5 4 3 2 1 0Name RFU RFU RFU RFU RFU RFU RFU FN_WUSTable 16-10 : TPLFE_FUNCTION_INFO DefinitionThe FN_WUS (Wake Up Support) bit signals the function's support of wake-up when the function is placedinto a low power state and the SDCLK is stopped. The intent is to allow a SDIO card to be placed into a lowpower condition and still signal the host of a wake-up event. If this bit is set to 1, then this function may beplaced into a low power state using some function standard or vendor defined method and the SDCLK canbe stopped with the power remaining applied to the card. Irrespective of the state of this bit, the host maystop the SDCLK as allowed by the Physical Layer Specification.Bit 7 6 5 4 3 2 1 0Name RFU RFU RFU RFU RFU RFU CSA_NF CSA_WPTable 16-11 : TPLFE_CSA_PROPERTY DefinitionThe CSA_WP bit is used to write protect the CSA for this function, or identifies it as read-only. If this bit is setto 1, then the CSA of this function is either write protected or read-only. If this bit is clear, then the host maywrite the CSA. Setting of this bit for R/W devices is handled in a vendor-defined method.The CSA_NF bit is used to indicate to the host that the CSA area should not be reformatted. If the bit is set to1, the host may not format the CSA file structure. If this bit is cleared to 0, then the host may reformat the filesystem of the CSA.16.7.5 CISTPL_FUNCE Tuple for Function 1-7 (Extended Data 02h)The CISTPL_FUNCE tuple gives the host common information about each individual function on aper-function basis. Existence of this tuple indicates that the card supports the Power State.Extended Data 02h consists of a list of power consumption up to 15 power states. The Power State isenabled when EMPC is set to 1 and PS[3:0] in FBR is set to a selected Power State Number and then EPSin FBR is not effective. Refer to Section 11.2.4 for more detail.Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_FUNCE (22h)01hTPL_LINK Link to next tuple (2n+2)02hTPLFE_TYPE Type of Extended Data (02h)03h00h (Fixed value)04h, 05h TPLFE_PS_0106h, 07h TPLFE_PS_0208h, 09h TPLFE_PS_03......... .........2n+2, 2n+3TPLFE_PS_nTable 16-12 : TPLFID_FUNCTION Tuple for Function 1-7 (Power State Tuple)68

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationFieldDescriptionTPLFE_PS_nThis 16-bit value indicates the maximum power consumption perfunction in mW and the range is from 1 to 65535 mW in 1mW step. Thenumber "n" indicates the power state number. Up to 15 power statescan be defined. The larger "n" field shall indicate the larger power value.If a value is set to 0, the host should ignore and skip it.The host needs to set a power state number to PS[3:0] in FBR and thecard shall operate below the power specified in this tuple.Table 16-13 : TPLFID_FUNCTION Field Descriptions for Functions 1-7 (Power State Tuple)16.7.6 CISTPL_SDIO_STD: Function is a Standard SDIO FunctionThis tuple code (91h) has been reserved for use by SDIO devices that conform to the applicationspecifications for standard SDIO functions, as defined in those separate specifications. The exact format forthis tuple can be found in those specifications. The basic format only is provided here and the reader isdirected to the appropriate Application Specification for Standard SDIO Functions for more complete details:Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_SDIO_STD (91h)01h TPL_LINK Link to next tuple (2 ≤ n ≤ 255)n is the number of bytes in the tuple body02hTPLSDIO_STD_ID03hTPLSDIO_STD_TYPE04h ... (n+1)TPLSDIO_STD_DATAIf n = 2, TPLSDIO_STD_DATA does not exist.Table 16-14 : CISTPL_SDIO_STD: Tuple Reserved for SDIO CardsThe fields in this tuple have the following definition:FieldDescriptionTPLSDIO_STD_IDThis 8-bit code identifies the Standard SDIO Function type for which thistuple supplies additional information. The available codes can be found inthe I/O device interface code entry of the FBR (Refer to Section 6.10)TPLSDIO_STD_TYPE This 8-bit value identifies the format and type of data contained within thebody of this tuple. If this value is 00h, then only 1 standard data structurehas been defined for this Standard SDIO Function. If this value isnon-zero, then this byte identifies which tuple data format is being used forthe data. This code is defined in the Application Specification for StandardSDIO Functions.TPLSDIO_STD_DATA The data component of this tuple (n-2 bytes). The format of this datastructure is defined in the Application Specification for Standard SDIOFunctions.Table 16-15 : TPL_CODE CISTPL_SDIO_STD Definition69

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association16.7.7 CISTPL_SDIO_EXT: Tuple Reserved for SDIO CardsThis tuple code (92h) has been reserved for future use by SDIO cards. The actual format of the data has notbeen established at this time. The basic format of this tuple is:Byte 7 6 5 4 3 2 1 000hTPL_CODE CISTPL_SDIO_EXT (92h)01h TPL_LINK Link to next tuple (0 ≤ n ≤ 255)n is the number of bytes in the tuple body02h ... (n+1)TPLSDIO_EXT_DATA The data component of this tuple (n bytes)If n=0, TPLSDIO_EXT_DATA does not exist.Table 16-16 : CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards70

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card Association17. Embedded SDIO17.1 Relaxing SDIO Requirements for Embedded Device17.1.1 Form FactorThe requirements regarding form factor are not applicable to an Embedded Device.17.1.2 CIS InformationSupporting of CIS is optional for an Embedded Device. If the host system has another method to recognizean embedded device, the CIS can be omitted.17.1.3 8-Bit Bus Mode8-bit mode is defined for only embedded usage. Achieving higher performance in the lower frequency is theobjective of this mode. In the case of 8-bit mode, skew adjustment and cross talk need to be considered. TheSD bus clock frequency is then limited to 50MHz and the UHS-I mode tuning by CMD19 is out of scope in 8bit mode.(The details of 8-bit mode are not defined in this document but it will be defined in a future specification.)17.2 Interface Signal for Embedded SDIO DeviceEmbedded SDIOBasicSD Bus IFCLKCMDDAT[3:0]VDDHGNDBP1BP2....BP7Back-End FunctionPower pinsOptionalData LineDAT[7:4]INT#Interrupt pin(Open drain)Figure 17-1 : Embedded SDIO InterfaceFigure 17-1 shows the recommended interface for the Embedded SDIO Device. This interface is suitable toconfigure a Shared Bus which is defined by the Part A2 Host Controller Specification Version 3.00.An Embedded Device can provide the back-end function power pins with any voltage. Therefore, hostinterface power and backend function power can be separated. The Sleep State of SDIO is defined by theIOEx=0 and back-end power can be off during the Sleep State.The Embedded Device should provide Interrupt pins (low active) to be able to use the device in a SharedBus configuration.17.3 Shared Bus ConfigurationFigure 17-2 shows an example configuration of a system supporting a card slot and shared bus. A card slotbus and shared bus are separated so that the removable card does not influence the devices on the sharedbus. The SD Bus signals except the clock signal are connected together on the shared bus. Each device isselected by individual clock pins. An example timing of clock signals is shown in Figure 17-3. Stopping theclock for an unselected device enables the system to reduce power consumption of the devices. Even if theSD bus clock is stopped, an SDIO device can generate an interrupt by the INT# pin to request a service toHost System. INT is an asynchronous interrupt, low active, open drain and then can be wired-or with theinterrupt pin of another device. A Pull-up resister is required for the INT# signal.71

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationSD HostCLK1CMD1DAT1[3:0]SD SlotRCASD MemoryCardRCASDIO Card• Slot 1 is for a removable Card• Slot 2 is for shared bus. Devices areconnected to a shared slot 2.• Each device is selected by one ofclock pins and the other clocks arestopped while unselected.• Each device can generate interrupteven if not selected.CLK2[7:1]CMD2DAT2[3:0]CLK2[1] CLK2[2] CLK2[3] CLK2[4]eSDeSDIOeSDIOeSDIOCLKCLKCLKCLKCMDCMDCMDCMDDAT[3:0]DAT[3:0]DAT[3:0]DAT[3:0]INT# INT# INT# INT#INT-A#INT-B#INT-C#RMaximum 7 SDIO FunctionsFigure 17-2 : Example Configuration Supporting Card Slot and Shared BusClock Pin Select[02:00] 000b 001b 010b 011bCLK[1]CLK[2]CLK[3]8ck(max.)8ck(max.)Figure 17-3 : Device Select Using Clock SignalA clock signal is assigned per deviceOne of the clocks is oscillated without overlapA Clock shall be generated within 8 clocks from when the Clock Pin Select is changed.A device can be switched while the selected device does not drive the SD Bus; e.g., while busy is notindicated. An Un-selected device can request the host to service with an interrupt.72

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationA.1 ReferenceAppendix A (Normative) : ReferenceThe following documents are referenced by this specification.This specification can apply to any released versions of below SD Specifications after Version 2.00.1) SD Specifications Part 1 Physical Layer Specification Version 3.01 February 18, 20102) SD Specifications Part 1 Standard Size SD Card Mechanical Addendum Ver3.00 February 18, 20103) SD Specifications Part 1 miniSD Card Addendum Version 2.01 March 27, 20084) SD Specifications Part 1 microSD Card Addendum Version 3.00 February 18, 20105) SD Specifications Part 1 eS Addendum Version 2.10 November 25, 20086) SD Specifications Part 2 File System Specification Version 3.00 April 16, 20097) ISO/IEC9293:1994Information technology - Volume and file structure of disk cartridges for information interchange8) PC CARD STANDARD Release 8.1 2002Volume 4 Metaformat Specification73

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationB.1 TerminologyAppendix B (Normative) : Special TermsEmbedded SDIO I/O or combo devices that are embedded in a host device that utilize the SDIOelectrical and command interface, but are not intended to be removed.FlashA type of multiple time programmable non volatile memoryFull-Size SDIO Card A SDIO card with physical dimensions based on the Standard Size SD Carddescribed in the Standard Size SD Card Mechanical Addendum.FunctionAn I/O device contained within an SDIO cardHigh-Power SDIO A SDIO device that requires up to 500 mA rather than the standard 200 mAallowed for a Standard-Power SDIO devicehi-ZA three-state driver in the high-impedance stateInterruptA signal from the SDIO device to the host signaling the need for attentionInterrupt Period The times that a card may generate an interrupt signal on the SD busLegacy Slot SD Slot that supports only the SD Physical Specification Version 1.01LOW, HIGHBinary interface states with defined assignment to a voltage levelMBIOMulti-Block I/OmicroSDIO Card A SDIO card based on the microSD card form factor.miniSDIO Card A SDIO card based on the miniSD card form factor.SDIO awareA host designed to support the signals and protocol of SDIO devicesStandard-Power A SDIO device that operates with 200 mA or less of current at all times.SDIOStuff bit(s)Filling bit(s) to ensure fixed length frames for commands and responses.SuspendTemporarily halting the transfer of dataThree-state driver A driver stage which has three output driver states: HIGH, LOW and highimpedance (which means that the interface does not have any influence onthe interface level)B.2 Abbreviations3CACMDBlockCCCRCDCIACIDCISCLKCMDThe original 3 companies that established the SDA and the SD cardspecificationApplication CommanD An additional set of commands created to support SDspecific requirements.A number of bytes, basic data transfer unitCommon Card Control RegistersConnect/DisconnectCommon Information AreaCard IDentification number registerCard Information StructureClock signalCommand line or SD bus command (if extended CMDXX)74

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationCombo Card A card that includes both SDIO and SD memoryCRCCyclic Redundancy CheckCSChip or Card SelectCSACode Storage AreaCSDCard Specific Data registerDAT[x] Data line where x is in the range of 0 to 3DSRDriver Stage RegisterECCError Correction CodeEMIElectro-Magnetic InterferenceESCExternal Signal ContactsESDElectro-Static DischargeFATFile Allocation TableFBRFunction Basic RegistersFIFOFirst In-First Out bufferMSB, LSBThe Most Significant Bit or Least Significant BitOCROperation Conditions RegisterPCMCIAPersonal Computer Memory Card International AssociationPnPPlug and Play a means to identify an SDIO device and optionally loadapplications and/or drivers without user interventionR/ORead OnlyR/WRead or WriteRAWRead After WriteRCARelative Card Address registerResumeRe-starting the temporarily halted data transferRFU Reserved for Future Use. Normally Read-Only and set to 0ROMRead Only MemoryRWCRead Wait ControlSCRSD Configuration RegisterSDASD AssociationSDCLKSD clock signalSDIOSD Input/OutputSPISerial Peripheral InterfaceTBDTo Be Determined (in the future)TupleData blocks in a linked list or chain formatUHSUltra High SpeedVDD+ Power supplyVSSPower supply groundW/OWrite OnlyWPWrite Protect75

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAppendix C (Normative) : Command ListC.1 SD Mode Command ListTable C- 1 and Table C- 2 show the commands that are supported by SD memory and SDIO devices in both SPIand SD modes. If a command is not identified as either mandatory or optional, then it is not supported by thatdevice.SupportedSDMEM SDIOAbbreviationCommandsSystem SystemCommentsCMD0 GO_IDLE_STATE Mandatory Mandatory Used to change from SD to SPI modeCMD2 ALL_SEND_CID Mandatory CID not supported by SDIOCMD3 SEND_RELATIVE_ADDR Mandatory MandatoryCMD4 SET_DSR Optional DSR not supported by SDIOCMD5 IO_SEND_OP_COND MandatoryCMD6 SWITCH_FUNC Mandatory 1 Added in Part 1 v1.10CMD7 SELECT/DESELECT_CARD Mandatory MandatoryCMD8 SEND_IF_COND Optional Optional SDHC or SDXCCMD9 SEND_CSD Mandatory CSD not supported by SDIOCMD10 SEND_CID Mandatory CID not supported by SDIOCMD11 VOLTAGE_SWITCH Optional Optional Mandatory if UHS-I supportedCMD12 STOP_TRANSMISSION MandatoryCMD13 SEND_STATUS Mandatory Card Status includes only SDMEM informationCMD15 GO_INACTIVE_STATE Mandatory MandatoryCMD16 SET_BLOCKLEN MandatoryCMD17 READ_SINGLE_BLOCK MandatoryCMD18 READ_MULTIPLE_BLOCK MandatoryCMD19 SEND_TUNING_BLOCK Optional Optional Mandatory if UHS-I supportedCMD23 SET_BLOCK_COUNT Optional Mandatory if SDR104 supportedCMD24 WRITE_BLOCK MandatoryCMD25 WRITE_MULTIPLE_BLOCK MandatoryCMD27 PROGRAM_CSD Mandatory CSD not supported by SDIOCMD28 SET_WRITE_PROT OptionalCMD29 CLR_WRITE_PROT OptionalCMD30 SEND_WRITE_PROT OptionalCMD32 ERASE_WR_BLK_START MandatoryCMD33 ERASE_WR_BLK_END MandatoryCMD38 ERASE MandatoryCMD42 LOCK_UNLOCK OptionalCMD52 IO_RW_DIRECT MandatoryCMD53 IO_RW_EXTENDED Mandatory Block mode is optionalCMD55 APP_CMD MandatoryCMD56 GEN_CMD MandatoryACMD6 SET_BUS_WIDTH MandatoryACMD13 SD_STATUS MandatoryACMD22 SEND_NUM_WR_BLOCKS MandatoryACMD23 SET_WR_BLK_ERASE_COUNT MandatoryACMD41 SD_APP_OP_COND MandatoryACMD42 SET_CLR_CARD_DETECT MandatoryACMD51 SEND_SCR Mandatory SCR not supported by SDIOTable C- 1 : SD Mode Command List1For Part 1 v1.10 or higher Memory or Combo Cards76

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationC.2 SPI Mode Command ListSupportedSDMEM SDIOAbbreviationCommandsSystem SystemCommentsCMD0 GO_IDLE_STATE Mandatory Mandatory Used to change from SD to SPI modeCMD1 SEND_OP_COND MandatoryCMD5 IO_SEND_OP_COND MandatoryCMD6 SWITCH_FUNC Mandatory 1 Added in Part 1 v1.10CMD9 SEND_CSD Mandatory CSD not supported by SDIOCMD10 SEND_CID Mandatory CID not supported by SDIOCMD12 STOP_TRANSMISSION MandatoryCMD13 SEND_STATUS Mandatory Card Status includes only SDMEM information.CMD16 SET_BLOCKLEN MandatoryCMD17 READ_SINGLE_BLOCK Mandatory .CMD18 READ_MULTIPLE_BLOCK MandatoryCMD24 WRITE_BLOCK MandatoryCMD25 WRITE_MULTIPLE_BLOCK MandatoryCMD27 PROGRAM_CSD Mandatory CSD not supported by SDIO.CMD28 SET_WRITE_PROT OptionalCMD29 CLR_WRITE_PROT OptionalCMD30 SEND_WRITE_PROT OptionalCMD32 ERASE_WR_BLK_START MandatoryCMD33 ERASE_WR_BLK_END MandatoryCMD38 ERASE MandatoryCMD42 LOCK_UNLOCK OptionalCMD52 IO_RW_DIRECT MandatoryCMD53 IO_RW_EXTENDED Mandatory Block mode is optionalCMD55 APP_CMD MandatoryCMD56 GEN_CMD MandatoryCMD58 READ_OCR MandatoryCMD59 CRC_ON_OFF Mandatory MandatoryACMD13 SD_STATUS MandatoryACMD22 SEND_NUM_WR_BLOCKS MandatoryACMD23 SET_WR_BLK_ERASE_COUNT MandatoryACMD41 SD_APP_OP_COND MandatoryACMD42 SET_CLR_CARD_DETECT MandatoryACMD51 SEND_SCR Mandatory SCR includes only SD-MEM information.Table C- 2 : SPI Mode Command List1For Part 1 v1.10 or higher Memory or Combo Cards77

SDIO Simplified Specification Version 3.00©Copyright 2000-2011 SD Card AssociationAppendix D (Normative)Appendix D is not included in the Simplified Specification.The Last Page78

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