tc_users_guide_v2.5 - Tasking

Using the Linker7−23The architecture definition of the LSL file should not be changed by youunless you also modify the core’s hardware architecture. If the LSL filedescribes a multi−core system an architecture definition must be availablefor each different type of core.The derivative definition (required)The derivative definition describes the configuration of the internal(on−chip) bus and memory system. Basically it tells the linker how toconvert offsets on the buses specified in the architecture definition intooffsets in internal memory. A derivative definition must be present in anLSL file. Microcontrollers and DSPs often have internal memory and I/Osub−systems apart from one or more cores. The design of such a chip iscalled a derivative.Altium provides LSL descriptions of supported derivatives, along with "SFRfiles", which provide easy access to registers in I/O sub−systems from Cand assembly programs. When you build an ASIC or use a derivative thatis not (yet) supported by the TASKING tools, you may have to write aderivative definition.When you want to use multiple cores of the same type, you mustinstantiate the cores in a derivative definition, since the linkerautomatically instantiates only a single core for an unused architecture.The processor definitionThe processor definition describes an instance of a derivative. A processordefinition is only needed in a multi−processor embedded system. It allowsyou to define multiple processors of the same type.If for a derivative ’A’ no processor is defined in the LSL file, the linkerautomatically creates a processor named ’A’ of derivative ’A’. This is whyfor single−processor applications it is enough to specify the derivative inthe LSL file, for example with −dtc1920b.lsl.The memory and bus definitions (optional)Memory and bus definition are used within the context of a derivativedefinition to specify internal memory and on−chip buses. In the context ofa board specification the memory and bus definitions are used to defineexternal (off−chip) memory and buses. Given the above definitions thelinker can convert a logical address into an offset into an on−chip oroff−chip memory device.• • • • • • • •