Dell Power Solutions

SYSTEM ARCHITECTURE• Low frequencies: Unlike serial data transfers, parallel transfersare frequency limited because of skew factors. Skew resultsfrom the requirement to synchronize all arriving data lineswith one another at the receiving end of a parallel transfer.Lower frequencies translate into lower performance when thebus width is limited by physical and electrical considerations.• Shared buses: Serial encoding schemes employ a point-topointtopology, whereas parallel encoding usually requiresmultiple devices to access a shared set of data lines. In thelatter case, resource contention can lead to suboptimalperformance.Examining the move toward serial architecture for ATA and SCSIWith the emergence of Serial ATA and Serial Attached SCSI, thetransition of disk protocols from parallel to serial architecture iswell under way. Serial ATA, a high-speed point-to-point link forATA, was created to address performance-limiting design issuesin the ATA specification. Serial ATA increases bandwidth and simplifiestopologies. Originally conceived as a desktop architecture,Serial ATA helps to improve performance and promises economicbenefits that have prompted storage designers to consider it forenterprise applications. 1Serial ATA enhances the ATA specification with capabilitiessuch as hot-plug drive swapping and native command queuing,which were not included in the parallel specification. By overcomingthe signal timing issues inherent in parallel ATA, Serial ATA allowsfor longer cable lengths—and for narrower cable widths, whichcan help improve airflow within a system enclosure.SCSI also is undergoing a parallel-to-serial conversion that promisesnew capabilities in addition to performance gains. Serial AttachedSCSI, the latest advance in SCSI technology following Ultra320 SCSI,offers serial point-to-point links that replace the parallel bus—andthus reduce the overhead—of today’s parallel SCSI topologies. SerialAttached SCSI is expected to be scalable to more than 16,000 physicaldevices in a single domain. In addition, it offers backward compatibilitywith legacy SCSI drivers and software by maintainingcompatibility with the SCSI protocol. Because Serial Attached SCSIinteroperates with Serial ATA devices, administrators can choose froma variety of drive types.Migrating the I/O bus from PCI and PCI-X to PCI ExpressThe primary I/O bus is currently transitioning from a parallel toa serial architecture that is similar to ATA and SCSI. The PCIExpress specification was developed to help minimize I/O busbottlenecks within systems and to provide the necessary bandwidthfor high-speed, chip-to-chip, and board-to-board communicationswithin a system.Parallel PCI has served as the dominant I/O bus for more thana decade. However, high-bandwidth applications—some availabletoday and many anticipated in the future—and usage models placedemands on CPUs, I/O devices, and the I/O bus that neither PCI norPeripheral Component Interconnect Extended (PCI-X ® ) is equippedto meet, largely because of their parallel encoding architectures. Forexample, a high-volume, low-cost server is often used to support anI/O-intensive video-on-demand system. Such systems are required toserve multiple streams of time-dependent data concurrently. Specificationsto provide this type of capability are built into PCI Express.Besides using serial encoding to help overcome the limitations of aparallel protocol, PCI Express offers the following features:• Cost-effectiveness: Works with high-volume, low-costcomponents such as standard chips and connectors• Performance across market segments: Meets the requirementsof mobile, desktop, server, and communicationsapplications• Scalability and life span: Scales to accommodate futureapplications through its capability to aggregate links to gainadditional bandwidth, and is designed with a life span torival that of PCI• Compatibility: Offers compatibility with previous PCIand PCI-X specifications and programming models• Data protection: Helps provide improved data integrityand error handlingOverview of PCI Express architectureMore than an evolution of the PCI and PCI-X bus interface, PCIExpress is a new, layered architecture that retains PCI and PCI-Xusage and software programming models. PCI Express architectureis a point-to-point serial interconnect that uses low-voltage differentialsignaling (LVDS). One new component in the architecture isa switch that replaces the parallel I/O bus of PCI and PCI-X. Devicesconnect to this switch through point-to-point connections called links,which consist of one or more lanes. A lane is a set of differentialsignals used to transmit data. PCI Express bridges to PCI and toPCI-X are other critical components that will help facilitate theadoption of PCI Express.The PCI Express architecture design offers the flexibility toaggregate lanes into higher-bandwidth links. A single lane, referredto as a ×1 link (pronounced “by one link”), can help support up to250 MB/sec in each direction. For example, a ×4 link can help supportup to 1 GB/sec in each direction (simplex) or 2 GB/sec in bothdirections (dual simplex). Figure 1 outlines the potential peak bandwidthcapabilities projected in the PCI Express specification as lanewidths are widened.1 The Serial ATA II Working Group is developing a specification to double overall bandwidth for Serial ATA to 3 Gbps.92POWER SOLUTIONS June 2004