24AA01/02

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24AA01/02FIGURE 4-1:BUS ACTIVITYMASTERBYTE WRITESTARTCONTROLBYTEWORDADDRESSDATASTOPSDA LINESPBUS ACTIVITYACKACKACKFIGURE 4-2:BUS ACTIVITYMASTERSDA LINEBUS ACTIVITYPAGE WRITESTARTSCONTROLBYTEACKWORDADDRESS (n) DATA n DATA n + 1 DATA n + 7ACKACKACKACKSTOPPDS21052H-page 6© 1998 Microchip Technology Inc.
24AA01/025.0 ACKNOWLEDGE POLLINGSince the device will not acknowledge during a writecycle, this can be used to determine when the cycle iscomplete (this feature can be used to maximize busthroughput). Once the stop condition for a write commandhas been issued from the master, the device initiatesthe internally timed write cycle. ACK polling canbe initiated immediately. This involves the master sendinga start condition followed by the control byte for awrite command (R/W = 0). If the device is still busy withthe write cycle, then no ACK will be returned. If thecycle is complete, then the device will return the ACKand the master can then proceed with the next read orwrite command. See Figure 5-1 for flow diagram.FIGURE 5-1:ACKNOWLEDGE POLLINGFLOWSendWrite CommandSend StopCondition toInitiate Write CycleSend StartSend Control Bytewith R/W = 0Did DeviceAcknowledge(ACK = 0)?YesNextOperation6.0 WRITE PROTECTIONThe 24AA01/02 can be used as a serial ROM when theWP pin is connected to VCC. Programming will be inhibitedand the entire memory will be write-protected.No7.0 READ OPERATIONRead operations are initiated in the same way as writeoperations with the exception that the R/W bit of theslave address is set to one. There are three basic typesof read operations: current address read, randomread, and sequential read.7.1 Current Address ReadThe 24AA01/02 contains an address counter thatmaintains the address of the last word accessed, internallyincremented by one. Therefore, if the previousaccess (either a read or write operation) was toaddress n, the next current address read operationwould access data from address n + 1. Upon receipt ofthe slave address with R/W bit set to one, the 24AA01/02 issues an acknowledge and transmits the eight bitdata word. The master will not acknowledge the transferbut does generate a stop condition and the 24AA01/02 discontinues transmission (Figure 7-1).7.2 Random ReadRandom read operations allow the master to accessany memory location in a random manner. To performthis type of read operation, first the word address mustbe set. This is done by sending the word address to the24AA01/02 as part of a write operation. After the wordaddress is sent, the master generates a start conditionfollowing the acknowledge. This terminates the writeoperation, but not before the internal address pointer isset. Then the master issues the control byte again butwith the R/W bit set to a one. The 24AA01/02 will thenissue an acknowledge and transmits the eight bit dataword. The master will not acknowledge the transfer butdoes generate a stop condition and the 24AA01/02 discontinuestransmission (Figure 7-2).7.3 Sequential ReadSequential reads are initiated in the same way as a randomread except that after the 24AA01/02 transmits thefirst data byte, the master issues an acknowledge asopposed to a stop condition in a random read. Thisdirects the 24AA01/02 to transmit the next sequentiallyaddressed 8-bit word (Figure 7-3).To provide sequential reads the 24AA01/02 contains aninternal address pointer which is incremented by one atthe completion of each operation. This address pointerallows the entire memory contents to be serially readduring one operation.7.4 Noise ProtectionThe 24AA01/02 employs a VCC threshold detector circuitwhich disables the internal erase/write logic if theVCC is below 1.5 volts at nominal conditions.The SCL and SDA inputs have Schmitt trigger and filtercircuits which suppress noise spikes to assure properdevice operation even on a noisy bus.© 1998 Microchip Technology Inc. DS21052H-page 7
Page 1 and 2: M24AA01/021K 1.8V I 2 C Serial EEP
Page 3 and 4: 24AA01/02TABLE 1-3:ParameterAC CHAR
Page 5: 24AA01/023.6 Device AddressThe 24AA
Page 9 and 10: 24AA01/02NOTES:© 1998 Microchip Te
Page 11 and 12: 24AA01/0224AA01/02 PRODUCT IDENTIFI

24AA01/02

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