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DL/UL l/fFigure 7Downlink processing function blocks.with power information for the downlinkpower control, and scrambling.TX board implementationFigure 8 shows the downlink processingboard (TX board), which is divided into twomain parts: the board processor and boardspecifichardware. The board processor controlsthe board and parts of the traffic. Theboard-specific hardware, which processesuser data sent to the air interface, containsthe lub user-plane interface handler,symbol-rate processor, chip-rate processor,and the physical layer processing controller.The lub user-plane interface handler handlesthe lub interface user-plane protocol forthe DCH and CCH data streams to the radionetwork controller.The symbol-rate processor handles thetransport channel (TrCH), the coded <strong>com</strong>positetransport channel (CCTrCH), thephysical channel for the primary and secondary<strong>com</strong>mon control physical channels,the paging indicator channel (PICH), andthe dedicated physical channel (DPCH).The chip-rate processor handles the distributionof physical channels, generates thesynchronization channel (SCH), the primary<strong>com</strong>mon pilot channel (P-CPICH) andacquisition indicator channel (AICH), andtransmits the distributed output sequencesto the TRX. It also measures the transmittedcode power and handles all cell-carrierprocessing-related functionality.The physical layer processing controllerhandles the configuration of the symbol-Figure 8TX board implementation.Ericsson Review No. 1, 2003 37

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