An Operating Systems Vade Mecum

96 Space Management Chapter 3This table is useful in deciding whether to swap out a segment, and it also points thestorage manager to all the segment tables that are affected when a segment is swapped inor out. Each process that shares a given segment has its own entry for that segment in itssegment table under its own local number for that segment. Each entry for the same segmentpoints to the same page table. The page table for a shared segment is stored onlyonce.6.4 Case study: VAXThe DEC VAX is a family of computers, all of which share the same address translationtechniques. Whereas Multics has two layers, the first segmentation and the second paging,the VAX has two paging layers; the user’s page table is itself paged. The reason forthis design is similar to the reasons for Multics: Processes are given so much virtualspace that the page tables can be absurdly long.In the VAX, a virtual address is 32 bits long. Bits [0..1] indicate which of threepage tables to use. Each process has two page tables. The first is intended for programand fixed-size data, and the second for data structures that grow, like a stack. The thirdpage table is shared by all processes and by the kernel, and is intended for shared subroutinesand for kernel program. Processes are not allowed to access kernel program. In asense, these three page tables are three predefined segments, so one could say that theVAX supports one level of segmentation and two levels of paging. Bits [2..22] of a virtualaddress is the page number. There are 2 21 = 2M pages in a full address space, so it isunreasonable to store the entire page table in main store, which often contains only 2Mbytes. It is unreasonable even on the largest VAX holding 32M bytes of main store.Therefore, the page tables are themselves paged. Bits [23..31] of a virtual address givethe offset within a page. There are 2 9 = 512 bytes in a page.Access permissions are determined for each page based on a combination of theprocessor state and the type of access required. There are four processor states, rangingfrom the most privileged (kernel state) to the least (user state). There are two kinds ofaccess, read and write. Read permission grants execute rights, and write permissiongrants read rights as well. One might expect 3 4 = 81 different permission combinationsfor each page, requiring 7 bits (or 8 for the most straightforward encoding). Instead, only3 bits are used to encode the 15 combinations in which any right granted to one processorstate is also granted to more privileged states. In the data structures below, we representthese combinations with strings like NNRW, which means that the lower two processorstates have no access, the next one has read access, and the most privileged state haswrite access.