An Operating Systems Vade Mecum

Preliminaries 61Processes deal with virtual addresses and ignore physical ones. However, every access aprocess makes must then undergo address translation to convert the virtual address tothe associated physical address. Address translation is shown in Figure 3.2, which depictsthe kernel and two processes each residing in the same physical main store. ProcessA is 13K in size, B is 10K, and the kernel is 19K. (Kernels range in size from about 5Kto over 300K.) The size of a process is not usually an integer number of K, but we willuse such sizes for A and B for simplicity. We will fill in details of this picture for the differentstorage management strategies that we will encounter.Every time a program (whether a process or the kernel) executes an instruction, itgenerates one or more references to addresses in virtual store: one to access the instruction,a second to access the first operand, a third to access the second operand, and afourth to deposit the result of the operation. (On some machines, like the Control DataCyber 205, one instruction can manipulate a large array of data, generating hundreds ofthousands of data accesses.) Since every reference must be translated, translation mustbe fast. This requirement means that we cannot afford to perform address translation insoftware. Instead, we require the hardware to perform most address translation for us.This result comes from a variation on the Cache Principle:Cache Principle (restated)Operations that must be performed often should be performed rapidly.The operating system designer must work within the constraints imposed by thehardware. If the hardware uses translation tables to guide address translation, theoperating system must construct those tables and make sure they hold correct information.The most active parts of these tables are often copied by the hardware into a cache013K 010Kprocess Aprocess Baddress translation064Kphysical main storeaddress translationkernel019KFigure 3.2 The space management problem