SFF-8449 - HD MANAGEMENT INTERFACE v1.1

More documents

Recommendations

Info

Development *** THIS IS NOT A FINAL DRAFT *** SFF-8449 Rev 1.1Mask AssertTimeMask DeassertTimeApplication orRate SelectChange TimePower_over-rideor Power-setAssert TimePower_over-rideor Power-setset (value = 1b) and IntL asserted.See SFF-8636.ton_mask 100 ms Time from mask bit set (value = 1b) 1until associated IntL assertion isinhibited . See SFF-8636.toff_mask 100 ms Time from mask bit cleared (value =0b) 1 until associated IntL operationresumes. See SFF-8636.t_ratesel 100 ms Time from change of state ofApplication or Rate Select bit 1 untiltransmitter or receiver bandwidth isin conformance with appropriatespecification. See SFF-8636.ton_Pdown 100 ms Time from P_Down bit set (value = 1b) 1until module power consumption reachesPower Level 1. See SFF-8636.toff_Pdown 300 ms Time from P_Down bit cleared (value =0b) 1 until the module is fullyfunctional 3 See SFF-8636.Deassert TimeNote 1. Measured from falling clock edge after stop bit of write transactionNote 2. Power on is defined as the instant when supply voltages reach andremain at or above the minimum level specified in Table TBDNote 3. Fully functional is defined as IntL asserted due to data not readybit, bit 0 byte 2, deasserted. The module should also meet optical andelectrical specifications.Note 4. Measured from falling clock edge after stop bit of read transactionTiming requirements for TX and RX squelch and disable controls are defined in table5.Table 5. Squelch & Disable Control TimingParameter Symbol Max Unit ConditionsRx SquelchAssert Timeton_Rxsq 80 us Time from loss of Rx input signaluntil the squelched outputRx SquelchDeassert TimeTx SquelchAssert TimeTx SquelchDeassert TimeTx DisableAssert TimeTx DisableDeassert TimeRx OutputDisable AssertTimeRx OutputDisable DeassertTimeSquelch DisableAssert Timecondition is reached.toff_Rxsq 80 us Time from resumption of Rx inputsignals until normal Rx outputcondition is reached.ton_Txsq 400 ms Time from loss of Tx input signaluntil the squelched outputcondition is reached.toff_Txsq 400 ms Time from resumption of Tx inputsignals until normal Tx outputcondition is reached.ton_txdis 100 ms Time from Tx Disable bit set(value = 1b) 1 until optical outputfalls below 10% of nominal. SeeSFF-8636.toff_txdis 400 ms Time from Tx Disable bit cleared(value = 0b) 1 until optical outputrises above 90% of nominal. SeeSFF-8636.ton_rxdis 100 ms Time from Rx Output Disable bitset (value = 1b) 1 until Rx outputfalls below 10% of nominal. SeeSFF-8636.toff_rxdis 100 ms Time from Rx Output Disable bitcleared (value = 0b) 1 until Rxoutput rises above 90% of nominal.See SFF-8636.ton_sqdis 100 ms This applies to Rx and Tx Squelchand is the time from bit set1HD Management Interface Page 14
Development *** THIS IS NOT A FINAL DRAFT *** SFF-8449 Rev 1.1Squelch DisableDeassert Time(value = 0b) 1 until squelchfunctionality is disabled. SeeSFF-8636.toff_sqdis 100 ms This applies to Rx and Tx Squelchand is the time from bit cleared(value = 0b) 1 until squelchfunctionality is enabled. See SFF-8636.Note 1: Measured from falling clock edge after stop bit of write transaction5.6 Power Consumption ModesThe management interface provides one mechanism to limit power consumption of thefree side device on the Vact pins.If the Power Override bit (See SFF-8636, page 00h, byte 93, bit 0) is low, the freesidedevice power is in the low power mode and power consumption shall be 1.5W orless. In addition, the free-side device shall be in low power mode if the Power Setbit (See SFF-8646, page 00h, byte 93, bit 1) is high, regardless of the PowerOverride bit state.If the Power Override bit is in the high state and the Power Set bit is low, thefree-side device power consumption may be greater than 1.5W. For this case, theExtended Identifier bits (See SFF-8636, page 00h, byte 129, bits 6-7) indicate themaximum consumption for the specific free-side device.If both Extended Identifier bits (See SFF-8636, Page 00h, byte 129, bits 6-7) are inthe low state, the free side device power consumption shall be 1.5W or less. In thiscase, the free side device shall be fully functional regardless of power mode (lowor high).If the Extended Identifier bits indicate a power consumption greater than 1.5W andthe free side device is in low power mode, the free side device shall reduce powerconsumption to 1.5W or less. The exact method of reducing power consumption is notspecified. However, it is likely that either the Tx or Rx or both will not beoperational in this state.A truth table for the relevant configurations of the Power Override, Power Set andextended identifier bits is shown in table 6.Table 6. Power Consumption Control FunctionalityPower Power Byte 129, Module Power AllowedOverride Set bits 7-60 X X 1.5W Default Power Level1 0 00 High Power (1.5W)1 0 01 High Power (2.0W)1 0 10 High Power (2.5W)1 0 11 High Power (3.5W)1 1 X Low Power (1.5W)Note, the symbol ‘X’ in a column indicates any entry satisfies the condition.The free side device may declare maximum power consumption levels less than 1.5W byusing the using ‘Advanced Low Power Mode’ parameter shown in table TBD. For example,if the fixed side does not support free side devices consuming more than 1W, thisHD Management Interface Page 15
Page 1 and 2: Development *** THIS IS NOT A FINAL
Page 7: Development *** THIS IS NOT A FINAL

SFF-8449 - HD MANAGEMENT INTERFACE v1.1

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?