A 2-Slot Time-Division Multiplexing (TDM) Interconnect ... - SLIP

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System Level ModelLogicdescription of2-TDM networkCircuitdescription of 2-TDM techniqueTechnologyparameters(100 nm)MultilevelInterconnectNetworkDesignSimulator(MINDS)Wire lengthdistributionmodel(Rent’s rule)Chip size, #metal layers, dynamic power,max. operating frequency, interconnectdistribution on various layers16 SLIP 2004

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Page 2: Outline!Motivation!TDM technique fo
Page 10 and 11: Source/Sink ProximitySet of sources
Page 12 and 13: Run Length ProximitySource!TDM tech
Page 15: System Level ModelTechnologyparamet
Page 19 and 20: Metal Layers% reduction in metal la
Page 21 and 22: Transistor-limited Area% increase i
Page 23 and 24: Results! Wire-limited area = 3 sq.c
Page 25: Future Work!Circuit Level Analysis!

A 2-Slot Time-Division Multiplexing (TDM) Interconnect ... - SLIP

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