Hitachi H8/3292

8.4 Operation .................................................................................................................................... 1258.4.1 FRC Incrementation Timing............................................................................................ 1258.4.2 Output Compare Timing ................................................................................................. 1268.4.3 FRC Clear Timing........................................................................................................... 1268.4.4 Input Capture Timing...................................................................................................... 1278.4.5 Timing of Input Capture Flag (ICF) Setting..................................................................... 1298.4.6 Setting of Output Compare Flags A and B (OCFA and OCFB)........................................ 1298.4.7 Setting of FRC Overflow Flag (OVF).............................................................................. 1308.5 Interrupts. .................................................................................................................................... 1308.6 Sample Application...................................................................................................................... 1318.7 Usage Notes ................................................................................................................................. 131Section 9 8-Bit Timers...............................................................................................1359.1 Overview. .................................................................................................................................... 1359.1.1 Features... ....................................................................................................................... 1359.1.2 Block Diagram................................................................................................................ 1359.1.3 Input and Output Pins...................................................................................................... 1369.1.4 Register Configuration .................................................................................................... 1379.2 Register Descriptions.................................................................................................................... 1379.2.1 Timer Counter (TCNT) ................................................................................................... 1379.2.2 Time Constant Registers A and B (TCORA and TCORB)............................................... 1389.2.3 Timer Control Register (TCR)......................................................................................... 1389.2.4 Timer Control/Status Register (TCSR)............................................................................ 1419.2.5 Serial/Timer Control Register (STCR) ............................................................................ 1429.3 Operation .................................................................................................................................... 1439.3.1 TCNT Incrementation Timing......................................................................................... 1439.3.2 Compare Match Timing .................................................................................................. 1449.3.3 External Reset of TCNT.................................................................................................. 1459.3.4 Setting of TCSR Overflow Flag (OVF) ........................................................................... 1459.4 Interrupts. .................................................................................................................................... 1469.5 Sample Application...................................................................................................................... 1469.6 Usage Notes ................................................................................................................................. 1479.6.1 Contention between TCNT Write and Clear.................................................................... 1479.6.2 Contention between TCNT Write and Increment............................................................. 1489.6.3 Contention between TCOR Write and Compare-Match................................................... 1499.6.4 Contention between Compare-Match A and Compare-Match B ...................................... 1499.6.5 Incrementation Caused by Changing of Internal Clock Source ........................................ 150Section 10 Watchdog Timer.......................................................................................15310.1 Overview.................................................................................................................................... 15310.1.1 Features. ....................................................................................................................... 15310.1.2 Block Diagram.............................................................................................................. 15310.1.3 Register Configuration .................................................................................................. 15410.2 Register Descriptions.................................................................................................................. 15410.2.1 Timer Counter (TCNT) ................................................................................................. 15410.2.2 Timer Control/Status Register (TCSR) .......................................................................... 15410.2.3 Register Access............................................................................................................. 156iv