The PowerPC 604 RISC Microprocessor - eisber.net

chain length 1 2 3 4 5 6 7 8 9 >9occurrences 1892 62 23 1 62 30 11 41 9 7 65Table 3. distribution of creator-store distancesi add iload a istore b istore aFigure 3. anti dependencea store conflicts due to dependences the creator places thevalue in a stack register. Additional dependences arise becauseof exceptions. The exception mechanism in Java isprecise. Therefore store instructions are not allowed tobe executed before an exception raising instruction. This ischecked easily by remembering the last instruction whichcould raise an exception. In methods which contain no exceptionhandler this conflict can be safely ignored becauseno exception handler can have access to these variables.3.4 Register allocationExpensive register allocation algorithms are neither suitablenor necessary. The javac compiler does a coloring ofthe local variables and assigns the same number to variableswhich are not active at the same time. The stack variableshave implicitly encoded their live ranges. When a value ispushed, the live range start. When a value is popped, thelive range ends.Complications arise only with stack manipulation instructionslike dup and swap. We flag therefore the firstcreation of a stack variable and mark a duplicated one as acopy. The register used for this variable can be reused onlyafter the last copy is popped.During stack analysis stack variables are marked whichhave to survive a method invocation. These stack variablesand local variables are assigned callee saved registers. Ifthere are not enough registers available, these variables areallocated in memory.Efficient implementation of method invocation is crucialto the performance of Java. Therefore, we preallocate theargument registers and the return value in a similar way aswe handle store instructions. Input arguments (in Java inputarguments are the first variables) for leaf procedures (andinput arguments for processors with register windows) arepreassigned, too.3.5 Instruction combiningTogether with stack analysis we combine constant loadinginstructions with selected instructions which are followingimmediately. In the class of combinable instructions areadd, subtract, multiply and divide instructions, logical andshift instructions and compare/branch instructions. Duringcode generation the constant is checked if it lies in the rangefor immediate operands of the target architecture and appropriatecode is generated.The old translator expanded some complex instructionsinto multiple instructions to avoid complex instructions inthe later passes. One of such instructions was the expansionof the lookup instruction in a series of load constant andcompare and branch instructions. Since the constants areusually quite small this unnecessarily increased the size ofthe intermediate representation and the final code. The newcompiler delays the expansion into multiple instructions tothe code generation pass which reduces all representationsand speeds up the compilation.3.6 ExampleFig. 4 shows the intermediate representation and stackinformation as produced by the compiler for debugging purposes.The Local Table gives the types and register assignmentfor the local variables. The Java compiler reusesthe same local variable slot for different local variables ifthere life ranges do not overlap. In this example the variableslot 3 is even used for local variables of different types(integer and address). The JIT-compiler assigned the savedregister 12 to this variable.One interface register is used in this example enteringthe basic block with label LO 04. At the entry of the basicblock the interface register has to be copied to the argumentregister A00. This is one of the rare cases where a moresophisticated coalescing algorithm could have allocated anargument register for the interface.The combining of a constant with an arithmetic instructionhappens at instruction 2 and 3. Since the instructionsare allocated in an array the empty slot has to be filled witha NOP instruction. The ADDCONSTANT instruction alreadyhas the local variable L02 as destination, an informationwhich comes from the later ISTORE at number 4. Similarlythe INVOKESTATIC at number 31 has marked all itsoperands as arguments. In this example all copies (besidethe one to the interface register) have been eliminated.5