the Ultimate 10 Gb/s Solution

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XFP Host System – Via Designs ■ Buried Stripline Important for Minimizing EMI Finisar ■ Vias for Transition from ASIC to Stripline and Stripline to XFP Connector �� Good Via Design is Critical to Meet XFI Specs ■ Via Tradeoffs �� Blind Vias Offer Minimum Parasitics – Most Expensive �� Through Vias are Standard Technology but Result in Via Stub ■ Design Balances Via Inductance with Capacitance to Ground Planes ■ Fullwave Analysis by Ansoft Resulted in Practical Via Designs Used in Finisar Reference Board. Lew Aronson October 17, 2002
Ansoft Reference Via Design Finisar De-embedded S-parameter 22 mil 12 mil 20.5 mil 31.5 mil 31.5 mil 31.5 mil 20.5 mil Lew Aronson October 17, 2002
Page 1 and 2: Finisar XFP The Ultimate 10Gb/s Sol
Page 3 and 4: Fiberoptic Transceivers and Transpo
Page 5 and 6: Fiber Optic Link Standards ■ Ethe
Page 7 and 8: Evolution of 1G Systems GLM Solutio
Page 9 and 10: Motivation for 10G Serial Interface
Page 11 and 12: XFP Multisource Agreement (MSA) Fin
Page 13 and 14: XFP MSA - Present Mechanical Design
Page 15 and 16: Form Factor Comparison XENPAK XFP 3
Page 17 and 18: XFP Pinout ■ Uses 30-pin Version
Page 19 and 20: XFI Interconnect Signal Integrity
Page 21 and 22: XFP MSA - EMI Considerations ■ Mi
Page 23 and 24: EMI Simulation Measurement Points F
Page 25 and 26: Finisar Recent XFP Results Finisar
Page 27 and 28: RX Electrical Output Eye from XFP L
Page 29: First Generation Reference Board Fi
Page 33 and 34: SMA - XFP Connector Section SMAs 62
Page 35 and 36: TDR Measurement- SMA and Vias SMA V
Page 37 and 38: Internal 2^31 PRBS Generation XBI M
Page 39 and 40: Finisar Ref Board SONET Jitter Meas
Page 41 and 42: Summary of XFP Advantages ■ Small

the Ultimate 10 Gb/s Solution

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