Stability of the Master Oscillator for FLASH at DESY

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48 4 MASTER OSCILLATOR where PFD is the phasedetector frequency that reads: PFD = fREF( ( 1 + D ) / R ) (28) where fREF is the reference frequency and D is a input frequency doubler Bit. The output frequency is adjustable due to equation 27 by the variables 1. R = 0...15 2. INT = 0. . .511 3. FRAC = 0. ..4095 4. MOD = 0. ..4095 and a doubler Bit D to double the input frequency 34 . Doubler Bit D is set off and R divider is set to 4. An example for programming the registers is put in the appendix. Loop Filter: The Loopfilter used in the PLL is an active Filter using an operation amplifier as sketched in figure 59. CP Offsetvoltage R4 R1 R5 R6 R2 C1 - + OPAMP LT1028 R3 C2 0 0 Figure 59: Loopfilter LOLA PLL The parameters chosen for the Filter here are listed in table 6. R1 0Ω R2 5kΩ C1 10nF R3 1kΩ C2 6.8nF R4 35 1kΩ R5 220Ω R6 1kΩ Table 6: Loop filter parameters 34 disabled here 34 R4, R5 and R6 for putting an offsetvoltage of 1.8 V at positve pin of operation amplifier Vtune
4.4 High Power Part for amplification of 81 MHz and 1.3 GHz signals 49 Performance of PLL: For the loop filter parameter estimation the reference phase noise of the locked 81 MHz VCXO has been scaled to 2.856 GHz, the phase noise of the freerunning SAW oscillator at 2.856 GHz, the simulated locked loop phase noise and the measured locked loop phase noise are sketched in figure 60. The integrated timing jitter including the spurs in the spectrum is smaller than 450 fs. phasenoise [dBc/Hz] 20 0 −20 −40 −60 −80 −100 −120 −140 10 0 −160 10 1 10 2 10 3 10 4 offsetfrequency [Hz] 10 5 sphi all sim VCO reference locked 2.856 GHz Figure 60: Loop filter estimation and measured phase noise of synchronized 2.856 GHz 4.4 High Power Part for amplification of 81 MHz and 1.3 GHz signals For the distribution of the signals over distances up to 300 m in the facility the output power of 20 dBm of the main distribution frequencies 81 MHz and 1.3 GHz delivered by the Low Power Part and the 1.3 GHz PLL as shown in figure 4.1 will not be sufficient for long distant tap points due to the attenuation in cables. Therefor additional amplification of these signals is necessary. The signals at 81 MHz and 1.3 GHz will be amplified up to 43 dBm. The amplifiers should not add drifts exceeding 1 ps at a constant temperature over an operating time of several hours. Up to this point investigations concerning the drifts of amplifier have been made [16] for a 1.3 GHz amplifier using the measurement principle introduced in section 3.2.3. For an ambient temperature change of 3 ◦ C the drifts at 1.3 GHz are within +/- 1 ps what seems do be promising to meet the design goal of drifts smaller than 1 ps. The drifts shows high correlation with ambient temperature changes. As a consequence a stabilization of ambient temperature in the accelerator environment is unavoidable. 10 6 10 7
Page 1 and 2: Stability of the Master Oscillator
Page 3 and 4: CONTENTS 3 Contents 1 Motivation 4
Page 5 and 6: 1.2 Assignment 5 1.2 Assignment The
Page 7 and 8: 2.2 Transmission of amplitude - and
Page 9 and 10: 2.5 Integrated phase noise and timi
Page 11 and 12: 3.2 Drift measurement methods 11 3.
Page 13 and 14: 3.2 Drift measurement methods 13 Fi
Page 15 and 16: 3.2 Drift measurement methods 15 Fi
Page 17 and 18: 4.1 Overview 17 The frequencies req
Page 19 and 20: 4.2 Low Power Part 19 Figure 12: Lo
Page 21 and 22: 4.2 Low Power Part 21 fredquency [M
Page 23 and 24: 4.2 Low Power Part 23 Figure 17: Ph
Page 25 and 26: 4.2 Low Power Part 25 81 MHz VCXO c
Page 27 and 28: 4.2 Low Power Part 27 Sensitivity [
Page 29 and 30: 4.2 Low Power Part 29 The circuit f
Page 31 and 32: 4.2 Low Power Part 31 The same has
Page 33 and 34: 4.2 Low Power Part 33 Magnitude (dB
Page 35 and 36: 4.2 Low Power Part 35 4.2.3 Divider
Page 37 and 38: 4.2 Low Power Part 37 fundamental 1
Page 39 and 40: 4.3 1.3 GHz and 2.856 GHz phase loc
Page 47: 4.3 1.3 GHz and 2.856 GHz phase loc
Page 51 and 52: Acknowledgements I would like to th
Page 53 and 54: Figure 61: Blockdiagram low power p
Page 55 and 56: Figure 63: Blockdiagram of 1300 MHz
Page 57 and 58: REFERENCES 57 References [1] vuv-fe

Stability of the Master Oscillator for FLASH at DESY

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