THIAGARAJAR COLLEGE OF ENGINEERING: MADURAI – 625 015 ...

System – Properties of Systems – Difference Equations – Frequency Response of Linear Discrete Time
System. (10 Periods)
Unit - V: Discrete Fourier Transform (DFT): Introduction – Comparison of DFT and Fourier Series –
Properties of DFT - Derivation of FFT – Application of FFT. (10 Periods)
Text Book:
1. Rodger E. Ziemer, William H. Tranter and D. Ronald Fannain “Signals & Systems Continuous
and Discrete”, Pearson Education 2002.
Reference Books:
1. M J Roberts, “Signals and Systems – Analysis using Transform Methods and MATLAB”,
TataMcGraw-Hill, 2003.
2. Simon Haykin, Barry Van Veen, “ Signals and Systems”, Wiley, 2 nd Edition, 2002
3. Alan V Oppenheim and Alan S. Willsky, “Signals & Systems”, Second Edition, Prentice Hall
India, 1997.
D36 DIGITAL CIRCUITS AND TECHNIQUES
Unit – I: Introduction TO Gates and Combinational Circuits: Basic digital circuits AND-OR-NAND-
NOR-EX-OR – EX – NOR operations – universal building block construction using logic gates – Boolean
Algebra – Simplification of Boolean functions – special forms of Boolean functions – min term (SOP)max
term (POS)-completely and incompletely specified switching function -. K Map representation of
Logic functions – Simplification of logic functions using K Map – Don’t care conditions – Five variable K
Maps- Quine McClusky Method - Half and Full Adders – Half and Full Subtractors
(10 Periods)
Unit – II: Sequential Circuits: Basic one bit memory cell- Flip Flop (RS, JK.D, T & Master slave JK) –
Excitation Table – clocked Flip Flop design – Edge triggered flip flops – NAND, NOR Gate Latch - Clock
Signals and Clocked Flip-Flops: SRFF, JKFF, DFF - D Latch - Asynchronous Inputs- IEEE/ANSI
Symbols- Flip-Flop Timing Considerations – Flip Flop Applications: Synchronization – Detecting
Sequence – Serial Parallel transfer – Frequency Division and Counting – Schmitt Trigger – One Shot.
(10
Periods)
Unit - III: Analysis of Synchronous Sequential Networks: Counter Design using D, SR and JKFF –
Structure Operation – Excitation and output Expressions – Transition Equation – Transition Table –
Excitation Table – State Tables and State Diagram – Mealy and Moore Model – Sequence Recognizer –
Algorithmic State Machine: ASM Chart for Sequential Recognizer – State Assignments – ASM Tables –
ASM Realization using Gates, MUX and PROM. Asynchronous Sequential Networks: Static and Dynamic
Hazards – Detection and Elimination – Hazard Free Combinational Logic Networks – Essential hazards.
(10 Periods)
Unit –IV: Registers & Counters: Asynchronous (Ripple) Counters- Counters with MOD Numbers 2 ^N.
IC Asynchronous Counters - Asynchronous Down Counter- Propagation Delay in Ripple Counters-
Synchronous (Parallel) Counters- Synchronous Down and Up/Down Counters. Presettable Counters- The
74LS193 - Decoding a Counter - Decoding Glitches - Cascading BCD Counters- Synchronous Counter
Design.- State Machines.--Integrated-Circuit Registers - Parallel In/Parallel Out, Serial In/Serial Out,
Parallel In/Serial Out and Serial In/Parallel Out Registers
(10 Periods)