DSP Signal Generator Implementation On C6713 DSK - ComLab

Figure 3.15: Shift register architecture with feedback for noise sequence generation
If we want to analyze the effect of superimposed noise on some external input signal, it can
accomplished by the altering the ISR (line 13 and14) as shown in figure 3.16.
1. interrupt void c_int11() //interrupt service routine
2. {
3. short prnseq; //for pseudo-random sequence
4. sample_data = input_sample(); //input sample
5. if(sreg.bt.b0) //sequence{1,-1}based on bit b0
6. prnseq = -300; //scaled negative noise level
7. else
8. prnseq = 300; //scaled positive noise level
9. fb =(sreg.bt.b0)^(sreg.bt.b1); //XOR bits 0,1
10. fb ^=(sreg.bt.b11)^(sreg.bt.b13);//with bits 11,13 ->fb
11. sreg.regval