1 简介

XN62Lxxx
PLL
SYSPLL_PD 0 PLL
•
ODSEL
ODSEL 2 OD
50%
•
M PLL
M 1PLL
•
PLL
M ODSEL
PLL PLL
PLL :
Table 5-31: PLL
FIN
VCO
FOUT
OD
M
N
PLL
PLL
sys_pllclkin SYSPLLCLKSEL
(VCO); 12.5MHz 500MHz.
PLL
sys_pllclkout. FOUT100MHz.
PLL
SYSPLLCTRL ODSEL
PLL SYSPLLCTRL
M
SYSPLLCTRL N
PLL
50%
FOUT=FIN X
M
N
X
1
OD
=
VCD
2 X OD
MOD
1. FIN
2. M
M = FOUT / FIN
3. VCO = 2 × OD × FOUT.
4.
5. FOUT 100MHz.
Table 5-32: PLL
PLL (FIN)
(FOUT) N M ODSEL
(
OD) VCO
12MHz 24MHz 1 8 10 () 4 192MHz
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