packaging - School of Electrical Engineering

1318 JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 18, NO. 6, DECEMBER 2009 

Room-Temperature Sealing of Microcavities 

by Cold Metal Welding 

Adit Decharat, Junchun Yu, Marc Boers, Göran Stemme, Fellow, IEEE, and Frank Niklaus, Member, IEEE 

Abstract—In this paper, we present a wafer-to-wafer attachment 

and sealing method for wafer-level manufacturing of microcavities 

using a room-temperature bonding process. The proposed 

attachment and sealing method is based on plastic deformation 

and cold welding of overlapping metal rings to create metal-tometal 

bonding and sealing. We present the results from experiments 

using various bonding process parameters and metal sealing 

ring designs including their impact on the resulting bond quality. 

The sealing properties against liquids and vapor of different sealing 

ring structures have been evaluated for glass wafers that are 

bonded to silicon wafers. In addition, wafer-level vacuum sealing 

of microcavities was demonstrated when bonding a silicon wafer to 

another silicon wafer with the proposed room-temperature sealing 

and bonding technique. [2008-0053] 

Index Terms—Bonding, fabrication, microelectromechanical 

devices, packaging. 

I. INTRODUCTION 

PACKAGING, assembly, and sealing are important parts in 

manufacturing of microelectromechanical systems [1]–[3] 

and microfluidic systems [4] and can be responsible for between 

25% and 80% of the total cost [5]. One way of manufacturing 

microcavities is the use of low-temperature wafer-level 

attachment and bonding techniques. Commonly used waferlevel 

bonding techniques for manufacturing of microcavities are 

glass-frit bonding [6]–[8], anodic bonding [9], solder bonding 

[10], eutectic bonding [11], thermocompression bonding [12], 

and adhesive bonding [13], [14]. The aforementioned bonding 

techniques typically require elevated temperatures of 100 ◦Cto 450 ◦C. In solder and eutectic bonding, the oxides at the metal 

surfaces need to be removed using, e.g., flux or other methods 

and eutectic and thermocompression bonding require very flat 

surfaces to achieve consistent bonding results over large areas. 

Polymer adhesives are typically not suitable for manufacturing 

of hermetically sealed cavities, since polymers are permeable 

to gasses [13]. Bonding with localized heating has been used 

to reduce thermally induced stresses in the bonded packages 

Manuscript received March 3, 2008; revised June 8, 2009. First published 

October 16, 2009; current version published December 1, 2009. This work was 

supported in part by the Swedish Intelligent Vehicle Safety Systems program 

and in part by Autoliv Development AB. Subject Editor L. Spangler. 

A. Decharat, G. Stemme, and F. Niklaus are with the Microsystem 

Technology Laboratory, School of Electrical Engineering, Royal Institute 

of Technology, 10044 Stockholm, Sweden (e-mail: adit.decharat@ee.kth.se; 

frank.niklaus@ee.kth.se; stemme@ee.kth.se). 

J. Yu is with the Physics Department, Umea University, SE-901 87 Umea, 

Sweden (e-mail: yujunchun@hotmail.com). 

M. Boers is with Phonak Acoustic Implants SA, CH-1027 Lonay, 

Switzerland (e-mail: marc.boers@gmail.com). 

Color versions of one or more of the figures in this paper are available online 

at http://ieeexplore.ieee.org. 

Digital Object Identifier 10.1109/JMEMS.2009.2030956 

1057-7157/$26.00 © 2009 IEEE 

[3], [16]–[20]. For many applications, the use of elevated 

temperatures is not desirable in the assembly, packaging, and 

sealing process. Temperature sensitive materials or components 

that degrade or are destroyed at elevated temperature may be 

present in the cavities or at the wafer surfaces. Gas molecules 

that are absorbed in the surfaces of the substrates can outgas 

and contaminate the atmosphere inside the microcavities if 

the wafers are heated during the bonding process [21]. In 

addition, temperature-induced stresses can be created during 

the wafer bonding process if two wafers are bonded that consist 

of materials with different coefficients of thermal expansion. 

Methods that have been reported for room-temperature mechanical 

attachment of substrates are the micro Velcro method 

[22], [23], the microbrush method [24], and cold welding of 

metals [25]–[27]. The micro Velcro method provides substrateto-substrate 

attachment using mechanical interlocking and the 

microbrush method uses plastic deformation of metal-coated 

polymer studs to establish electrical contacts between the two 

substrates in addition to the substrate-to-substrate attachment 

feature. In cold welding, a metallic bond is formed at room 

temperature between two metal surfaces by the application of 

pressure. Neither of the aforementioned methods has been used 

for manufacturing and sealing of microcavities. In this paper, 

we present a wafer-to-wafer attachment and sealing method 

for manufacturing of microcavities at room temperature. In the 

proposed method, corresponding metal sealing rings are located 

on the two wafer surfaces to be bonded. The two wafer surfaces 

with the corresponding and slightly overlapping sealing rings 

are aligned and pressed to each other. The resulting bonding 

pressure causes high shear and compressive strains and thus, 

plastic deformation and fusing at the overlapping areas of 

the corresponding metal rings and ultimately sealing of the 

cavities. The proposed attachment and sealing process can be 

performed at room temperature and is, in principle, insensitive 

to rough surfaces at the bond rings because material fusion 

during bonding takes place at the side walls of the counterfitting 

style sealing rings. We present experimental results from roomtemperature 

bonding of glass wafers to silicon wafers and from 

room-temperature bonding of silicon wafers to silicon wafers 

containing corresponding gold metal sealing rings with varying 

overlapping areas, dimensions, and geometries. 

II. METAL-TO-METAL COLD WELDING FOR 

ROOM-TEMPERATURE SEALING OF MICROCAVITIES 

Fig. 1 shows a schematic cross-sectional view of a wafer 

pair containing corresponding metal sealing rings that define 

the cavities. Fig. 1(a) shows the wafer pair before and Fig. 1(b) 

Authorized licensed use limited to: KTH THE ROYAL INSTITUTE OF TECHNOLOGY. Downloaded on February 4, 2010 at 08:43 from IEEE Xplore. Restrictions apply.

DECHARAT et al.: ROOM-TEMPERATURE SEALING OF MICROCAVITIES BY COLD METAL WELDING 1319 

Fig. 1. Schematic cross-sectional view of the wafers with corresponding metal sealing rings (a) before and (b) after bonding. 

Fig. 2. (a) Top view of three types of microcavities with metal sealing rings on wafer 1 and corresponding metal sealing rings on the wafer 2. (b) Threedimensional 

view of the overlaying sealing rings of an aligned and bonded wafer pair. 

after the wafer pair is aligned and brought into contact. Fig. 2(a) 

shows a schematic top view of a first wafer with three different 

cavity structures containing 2, 3, and 5 metal sealing rings 

per cavity and the corresponding rings on the second wafer 

with 1, 2, and 4 metal sealing rings. When the wafers are 

properly aligned to each other, the corresponding metal sealing 

rings have small overlapping areas. The wafer pair is pressed 

together by applying a uniform force. As a result, the corresponding 

metal sealing rings wedge into each other, as shown 

in Figs. 1(b) and 2(b). This is due to the creation of large local 

shear and compressive strains at the overlapping edges of the 

metal sealing rings, resulting in localized plastic deformation 

and cold welding. 

The resulting bonded area that seals the cavities and holds 

the wafers together consists of the wedged overlapping areas of 

the corresponding metal sealing rings. This area is very small 

in relation to the total wafer area and the forces to which the 

bond can be exposed by, e.g., wafer handling and dicing. To 

Fig. 3. Introduction of an underfill material in the gap in between the bonded 

wafer pair to reinforce the bond strength of the sealed bonds. 

reinforce the wafer bond, an underfill material (e.g., an underfill 

epoxy) can be introduced in the gap between the bonded wafer 

pair after the wafers are joined and the cavities are sealed, as 

shown in Fig. 3. The underfill material fills the gap between the 

wafers by capillary forces. Depending on the selected material, 

the hardening of the underfill material can be achieved at room 

temperature or at an increased curing temperature. The final 



Fig. 4. (a) Cross-sectional profile of the electroplated gold sealing rings with nominal dimensions (not to scale). (b) Cross-sectional SEM image of an 

electroplated gold sealing ring. 

bond strength is predominantly determined by the used underfill 

material. 

III. EXPERIMENTS 

A. Manufacturing of Sealing Rings 

In the experiments, electroplated gold was selected as metal 

for the sealing rings that define the microcavities because gold 

is a relative soft and deformable material. The metal sealing 

rings are manufactured by sputtering a thin gold seed layer on 

the wafers. Next, a thick photoresist layer (> 30 μm) is coated 

and patterned, and thereby defines the areas for the sealing 

rings. Gold is electroplated at the areas where the photoresist is 

patterned (removed), and thus, the photoresist is functioning as 

a mold for the electroplated gold. Subsequently, the photoresist 

mold and the gold seed layer are removed with wet-etching 

processes, and the wafers are rinsed with deionized water and 

dried. Gold sealing rings with a height of 30 μm and a width 

of 50 μm have been used to define the microcavities. Fig. 4(a) 

shows a schematic cross section of an electroplated gold sealing 

ring profile including the nominal dimensions, and Fig. 4(b) 

shows a scanning electron microscope (SEM) image of the 

cross section of an electroplated gold sealing ring. The convex 

side walls of the gold sealing ring origins from the patterning 

process of the positive photoresist mold. In principle, sealing 

rings with 90◦ angles or with concave side walls may also be 

suitable. The sealing rings for the microcavities are manufactured 

on 100-mm-diameter silicon and glass wafers. Each wafer 

pair contains 54 microcavities with different cavity shapes 

(rounded corners and squared corners), different cavity sizes 

(1000 μm × 3500 μm, 3500 μm × 3500 μm, and 8000 μm × 

8000 μm), different numbers of sealing rings (2, 3, and 5 with 

matching 1, 2, and 4 sealing rings), and different overlapping 

lengths of the sealing rings (2, 3, 4, and 6 μm). The different 

cavity shapes and sizes are shown in Fig. 5. The overlapping 

lengths of the sealing rings, as shown in Fig. 1(b), are defined 

as the overlap (e.g., 2, 3, 4, or 6 μm) on each side of the upper 

outline of the sealing ring on one wafer with the upper outline 

of the corresponding sealing rings on the second wafer. The 

smallest overlapping length of 2 μm represents the best possible 

wafer-to-wafer alignment accuracy of the available alignment 

equipment. The total overlapping area of the gold sealing ring 

design used in the experiments are 12.78 · 10−6 m2 per wafer. 

Fig. 5. Evaluated cavity shapes and sizes with denotations. Measures are 

given in micrometers. 

The yield strength of gold has been reported to be on the order 

of 200 MPa [28]. The total required wafer bonding force to get 

plastic deformation in the overlapping gold sealing ring areas 

can be roughly estimated with F = σ · A, where σ is the stress 

and A is the total overlapping area of the corresponding sealing 

rings of the wafer pair. 

B. Wafer-Level Sealing of Cavities When Bonding Silicon 

Wafers to Glass Wafers 

A total of six silicon-glass wafer pairs have been bonded 

with the proposed room-temperature sealing and attachment 

method. The glass wafers are used in the experiments to be 

able to inspect and evaluate the sealing rings and the cavities 

after the wafer pairs are bonded. In four of the experiments, a 

500-μm-thick glass wafer was bonded to a 300-μm-thick 

double-sided polished silicon wafer. In two of the experiments, 

a 500-μm-thick glass wafer was bonded to a 500-μm-thick 



Fig. 6. View through the top glass wafer at the bond interface of a cavity. 

Three sealing rings with rounded corners on the silicon wafer and the corresponding 

two sealing rings on the glass wafer are shown. The inside of the 

cavity contains color traces from IPA vapor that has penetrated the cavity during 

a gross-leak test. 

double-sided polished silicon wafer. The room-temperature 

wafer-to-wafer attachment (bonding) and cavity sealing is done 

in a standard commercial wafer bonder. Two wafers with corresponding 

sealing rings are aligned using commercial wafer-towafer 

alignment equipment. The alignment keys on the wafers 

can be observed through the transparent glass wafer. After 

alignment, the wafer pair is fixed on a standard bond fixture of 

the wafer bonder with the spacers of the bond fixture separating 

the two wafers. The aligned wafers on the bond fixture are 

transferred to the bond chamber and the chamber is evacuated 

to a pressure of 10 −4 mbar. The wafers remain in the vacuum 

atmosphere for 1 h to remove excess moisture and gasses 

from the wafer surfaces before the wafers are joined inside the 

vacuum atmosphere by removing the spacers in between them. 

Next, a bond force of 2.5 kN is applied for 10 min to the wafer 

stack with the bond tool. Thereafter, the bond force is removed, 

the bond chamber is vented, and the bonded wafer pair is taken 

out of the bond chamber. All bonding steps are performed at 

room temperature. 

After the wafer-to-wafer attachment process, the sealing 

rings are inspected with an optical microscope through the glass 

wafers. For all bonded wafer pairs and cavity types, the integrity 

of the gold sealing rings remained intact. Even if the wafers 

were slightly misaligned (on the order of 2 to 3 μm) prior to 

the wafer-to-wafer attachment, the gold sealing rings wedge 

into each other. Fig. 6 shows an image, taken through the top 

glass wafer of a bonded wafer pair, on which two gold sealing 

rings that are wedged into three corresponding sealing rings can 

be seen. Fig. 7 shows an image, taken through the top glass 

wafer of a bonded wafer pair, in which gold sealing rings that 

have squared corners can be seen. At the squared corners of the 

cavities, small fractures are visible in the surface of the glass 

wafer underneath the gold sealing rings. 

Fig. 8 shows a cross-sectional SEM image of a diced sample 

of a bonded wafer pair. The image depicts the end of sealing 

ring evaluation structures consisting of three gold sealing rings 

on the lower silicon wafer (wafer 2) and two gold sealing rings 

on the upper glass wafer (wafer 1). The sealing ring structures 

consist of straight lines and do not form an enclosed cavity. The 

cut for the cross section is done a few micrometers apart from 

the end of the sealing ring structures in order not to affect or 

damage the structures during dicing. As expected, the sealing 

ring structures are plastically deformed and wedged into each 

other. 

Fig. 7. View through the top glass wafer at the bond interface of a cavity. Two 

sealing rings with squared corners on the silicon wafer and the corresponding 

two sealing rings on the glass wafer are shown. Fractures in the glass wafer 

surface at the cavity corner are indicated. 

All microcavities of two of the bonded silicon-glass wafer 

pairs were evaluated with a gross-leak test to investigate the 

cavity sealing. In the gross leak tests, isopropanol alcohol 

(IPA) is injected in the 30- to 40-μm-wide gap that exists 

between the bonded wafers. The gap fills with the liquid IPA by 

capillary forces. Liquid and vapor IPA can enter the cavities that 

contain gross leaks. Liquid and vapor leakage into the cavities 

is visually detected through the glass wafer. When performing 

the gross leak tests, a number of cavities were immediately 

filled with liquid IPA, indicating gross leaks in these cavities. 

Most cavities on the silicon-glass wafer pairs were penetrated 

by IPA vapor, which then condenses inside the cavities, as 

shown in Fig. 6. For a total of six of the cavities, no penetration 

with IPA vapor was observed, indicating good sealing of these 

cavities. Table I shows the cavity designs that have been sealed 

without detectable gross leaks. Of the sealed cavities, one is 

8000 μm × 8000 μm (type A), four are 3500 μm × 3500 μm 

(type B, E, and F), and one is 1000 μm × 3500 μm (type D), 

and all cavities have rounded corners. As can be seen in Table I, 

five of the sealed cavities have three sealing rings on one wafer 

and two corresponding sealing rings on the second wafer, and 

one of the sealed cavities has five sealing rings on one wafer and 

four corresponding sealing rings on the second wafer. Four of 

the sealed cavities have sealing rings with overlapping lengths 

of 2 μm and two with overlapping lengths of 4 μm. 

In addition to the aforementioned described experiments, one 

bonded wafer pair was separated using force. The force needed 

to separate the wafers is comparably small. This is because 

the regions that hold the bonded wafers together are limited to 

the comparably small sealing ring areas. When inspecting the 

fractured bond interface at the sealing rings, it was observed 

that on most parts of the wafer, the gold sealing rings are broken 

away from the glass wafer and still remain bonded to the gold 

rings on the silicon wafer. Fig. 9 shows a top view of a bonded 

gold ring after the top glass wafer has been removed by force. 

A piece of glass that was broken out of the glass wafer remains 

bonded to the gold sealing ring that was originally positioned 

on the glass wafer. This indicates very good bonding and cold 

welding of the corresponding overlapping gold sealing rings 

due to plastic deformation of these areas. 

C. Wafer-Level Sealing of Cavities When Bonding Silicon 

Wafers to SOI Wafers 

A total of two silicon-SOI wafer pairs have been bonded 

with the proposed room-temperature sealing and attachment 



Fig. 8. Cross-sectional SEM images with (a) counterfitting sealing ring structures that are wedged into each other and (b) close-up view of the interface of two 

counterfitting sealing ring structures. 

TABLE I 

SEALING RESULTS FROM THE GROSS LEAK EXPERIMENTS FOR CAVITIES WITH DIFFERENT SHAPES, 

SIZES, OVERLAP LENGTHS OF SEALING RINGS, AND NUMBER OF SEALING RINGS 

method. In both experiments, a 525-μm-thick SOI wafers was 

bonded to a 500-μm-thick double-sided polished silicon wafer. 

The silicon device layer of the SOI wafers is 20 μm thick, 

and the SiO2 layer is 1 μm thick. To be able to align the 

corresponding gold sealing rings on the nontransparent silicon 

and SOI wafers, a standard wafer-to-wafer alignment procedure 

is used that features wafer backside alignment keys together 

with digitized images. This is done using commercial waferto-wafer 

alignment equipment. After the wafer alignment, the 

wafer pair is fixed on the bond fixture of the wafer alignment 

equipment with the spacers from the bond fixture separating 

the two wafers. The aligned wafer pair on the bond fixture 

is transferred from the aligner to the bond chamber, and the 

chamber is evacuated to a pressure of 10 −4 mbar. The wafers 

remain in the vacuum atmosphere for 3 h to remove excess 

moisture and gasses from the wafer surfaces before the wafers 

are joined inside the vacuum atmosphere by removing the 

spacers. Next, the wafer stack is pressed together with the bond 

tool. Thereafter, the bond force is removed, the bond chamber is 

vented, and the bonded wafer pair is carefully taken out of the 

bond chamber. One wafer pair was pressed with a bond force 

of 2.5 kN for 10 min, and the second wafer pair was pressed 

with a bond force of 2.8 kN for 10 min. For both bonded wafer 

pairs, a low-viscosity two-component epoxy is introduced in 

between the gap of the wafers, as shown in Fig. 3. The twocomponent 

underfill epoxy cures at room temperature and reinforces 

the bond between the wafers at the corresponding sealing 

rings. 



Fig. 9. Top view of a sealing ring section on the silicon wafer after bonding 

and subsequent forceful separation of the wafer pair. The gold ring from the 

glass wafer is remaining in between the gold rings on the silicon wafer. A glass 

piece that has been broken out of the glass wafer remains on the gold sealing 

ring from the glass wafer. 

Fig. 10. (a) Bulk silicon of the SOI wafer is thinned down with DRIE. 

(b) Differential pressures between the inside and the outside atmospheres of 

the microcavity cause the thin silicon lid membranes to deflect. 

To estimate the pressure level of the encapsulated atmosphere 

inside the microcavities and to detect possible gross leaks, the 

bulk silicon of the SOI wafer is removed by deep reactive ion 

etching (DRIE) and using the SiO2 layers of the SOI wafers 

as the etch stop, as shown in Fig. 10(a) and (b). Thus, only 

the 20-μm-thick silicon device layer together with the 1-μmthick 

SiO2 layer remains as lid on the sealed cavities. If a 

pressure difference exists between the atmospheres inside and 

outside a cavity, the thin silicon membrane deflects, as shown 

in Fig. 10(b). 

After thinning the bulk silicon of the SOI wafer with DRIE 

from the wafer pair that was bonded with a bond force of 

2.5 kN, about 50% of the membranes of the microcavities 

deflect strongly to the inside of the cavities. This indicates a 

significantly lower pressure inside these cavities as compared 

to the outside pressure. For all other cavities on this wafer, the 

20-μm-thin lid membranes were approximately leveled with a 

slight predeflection on the order of a few micrometers, most 

likely a result from the strain in the remaining SiO2 layer. 

Fig. 11 shows images of microcavities of types A, D, and E for 

which the membranes deflected to the inside of the cavities. It is 

shown in Fig. 11(a) that for the largest microcavity with a size 

of 8000 μm × 8000 μm (type A), the silicon membrane is deflected 

to an extent that it touches the bottom of the cavity. The 

Fig. 11. Images of sealed microcavities at atmospheric pressure with the lid 

membranes bending to the inside of the cavities. All successfully sealed cavities 

have rounded corners. The cavities are (a) type A (8000 μm × 8000 μm), 

(b) type D (1000 μm × 3500 μm), and (c) type E (3500 μm × 3500 μm). 

effective cavity height of this cavity has been measured with a 

profilometer to be about 53 μm. This suggests that the wedging 

depth of the corresponding gold sealing rings for this cavity is 

on the order of 7 μm. None of the microcavity lid membranes of 

the wafer pair bonded with a bond force of 2.8 kN are deflected 

after the bulk silicon of the SOI wafer was removed with DRIE. 

This indicates that none of the microcavities of this wafer are 

sealed. 

For an indicative estimate of the gas pressure inside the 

sealed cavities, they are placed in a vacuum chamber with a 

glass window. When decreasing the gas pressure in the vacuum 

chamber, the deflection of the cavity membranes decreases until 

the membranes level and then protrude to the outside of the 

cavities. Leveling of a cavity membrane happens when the 

pressure inside the cavity is on the same order as the pressure 

in the vacuum chamber. Leveling of the cavity membranes is 

detected by visual observation through the glass window of 

the vacuum chamber. When lowering the gas pressure in the 

vacuum chamber, leveling of the cavity membranes happened 

for most sealed cavities at pressure levels on the order of 5 to 

10 mbar. For the microcavities with the lowest estimated gas 

pressures (type A), the membranes level at gas pressures below 

5 mbar. The pressure measurements have been repeated one 

month, three months, and six months after the sealing of the 

cavities. No detectable change in the vacuum pressures at which 

the cavity membranes level have been observed. However, it 

must be pointed out that the effective pressure differences 

between the inside and the outside of the microcavities are very 

small at the leveling point of the membranes. Thus, the visual 

detection of the cavity membrane deflection is not sufficiently 

accurate for reliable comparative measurements and provides 

only indicative estimates for the levels of the gas pressure 

inside the microcavities. A basic model for the deflection of 

the cavity membrane has been used to verify the estimated 

pressure range inside the cavities. Cavity membranes are deflected 

by the difference in pressure ΔP between the outside 

of the cavities (atmospheric pressure Patm) and the inside of 

the cavities (cavity pressure Pvac). Thus, the cavity pressure 



relative to ambient atmospheric pressure can be estimated from 

Pvac = Patm − ΔP , where Patm = 1013 mbar. To estimate 

large load deflections of flat circular diaphragms (y0 < h/2), 

the analytical expression 

ΔPa4 = 

Eh4 16 

3(1 − μ2 yo 7 − μ 

+ 

) h 3(1 − μ) 

can be used [29], where h is the membrane thickness, E is the 

Young’s modulus, μ is the Poisson’s ratio, a is the diaphragm 

radius, and y0 is the center deflection of the diaphragm. The 

resulting center deflection of the membranes from the circular 

cavities (type B, 3500-μm diameter) was measured with a 

profilometer to be about 40 μm, excluding offset deflection 

from the SiO2 strain. With a silicon membrane thickness of 

20 μm (excluding the 1-μm-thick SiO2 layer), a Young’s 

modulus of 162 GPa, and a Poisson’s ratio of 0.22 [30], the 

estimated pressure difference ΔP can be calculated to be on 

the order of 970 mbar. Thus, the estimated gas pressure inside 

the cavity would be on the order of 40 mbar, which is in line 

with the estimates from the cavity membrane deflection inside 

a vacuum chamber. 

IV. DISCUSSION 

In the experiments, it was shown that the proposed roomtemperature 

wafer-to-wafer attachment and cavity sealing 

method works in principle. However, it was observed that 

localized fractures in glass wafers underneath the gold sealing 

rings can occur when bonding silicon wafers to glass wafers. 

Localized fractures underneath the gold sealing rings in the 

silicon wafers were not observed. It is believed that the large 

local stresses from the cold welding process near the overlapping 

areas of the gold sealing rings cause stress peaks in the 

glass that exceed its yield strength and, thus, cause the localized 

fractures of the glass. This is specifically the case for cavities 

with squared corners where the strain during bonding can 

aggregate at the squared corners, as shown in Fig. 6. The results 

from the experiments and the gross leak tests indicate that 

the main failure mechanism that causes the gross leaks in the 

experiments described in Table I are localized fractures of the 

glass wafers underneath the gold sealing rings due to excessive 

shear or compressive stresses. In the two bonding experiments 

in which silicon wafers were bonded to SOI wafers, the wafer 

pair that was bonded with the lower bonding force (lower strain 

in the sealing rings) achieved good sealing results (no gross 

leaks), while the wafer pair that was bonded with the higher 

bonding force did not achieve sealing of any of the cavities 

(contain gross leaks). The exact reason for this effect is not 

known. Possible explanations may be that the wafer pair was 

not sufficiently aligned before the wafer bonding step or the 

bonding force was too large and thus, causing local breakage 

of the silicon substrate material or delamination of the gold 

sealing rings from the silicon substrate surface due to excessive 

localized strain. It is interesting to point out that for the sealed 

microcavities, the wedging gold sealing rings penetrated each 

other only about 7 μm deep, which was sufficient to provide 

successful sealing without detectable gross leaks. 

y 3 o 

h 3 

(1) 

V. C ONCLUSION 

A room-temperature wafer attachment and sealing concept 

has been introduced and experimentally evaluated. Microcavities 

manufactured with this technique have been successfully 

sealed without detectable gross leaks. The shape of the cavities, 

the overlapping area of the sealing rings, and the wafer materials 

were found to influence the bonding and sealing results. 

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Adit Decharat received the M.Sc. degree in electrical 

engineering from King Mongkut’s Institute 

of Technology Ladkrabang, Bangkok, Thailand, in 

2002. 

In 2005, he joined the Department of Electrical 

Engineering, Royal Institute of Technology, 

Stockholm, Sweden. His research interest is in 

MEMS integration and packaging for commercial 

IR cameras. 

Junchun Yu was born in Xiangtan, China, on 

July 17, 1983. He received the B.S. degree from 

Central South University, Changsha, China, and the 

M.S. degree in nanomaterials and nanotechnology 

from the Royal Institute of Technology, Stockholm, 

Sweden. He is currently working toward the Ph.D. 

degree in the Physics Department, Umea University, 

Umea, Sweden. 

Marc Boers received the M.S. degree in microengineering 

from Swiss Federal Institute of Technology, 

Lausanne, Switzerland, in 2006. 

During his M.S. studies, he served an internship at 

Microsystem Technology Group, Royal Institute of 

Technology, Stockholm, Sweden, where he collaborated 

to develop a low-cost wafer-level-packaging 

technology. He is currently a Development Engineer 

with the Phonak Acoustic Implants SA, Lonay, 

Switzerland, working in the medical industry on 

implantable hearing aid solutions. 

Göran Stemme (M’98–SM’04–F’06) received the 

M.Sc. degree in electrical engineering and the Ph.D. 

degree in solid-state electronics from Chalmers University 

of Technology, Gothenburg, Sweden, in 1981 

and 1987, respectively. 

In 1981, he joined the Department of Solid State 

Electronics, Chalmers University of Technology. 

There, in 1990, he became an Associate Professor 

(docent) heading the silicon sensor research group. 

In 1991, he was appointed Professor at the Royal 

Institute of Technology (KTH), Stockholm, Sweden, 

where he currently heads the Microsystem Technology Group, School of 

Electrical Engineering. He has published more than 260 research journal and 

conference papers and has more than 22 patent proposals or granted patents. 

His research is devoted to microsystem technology based on micromachining 

of silicon. 

Dr. Stemme is a member of the Royal Swedish Academy of Sciences. 

Frank Niklaus (M’00) received the M.Sc. degree in 

mechanical engineering from the Technical University 

of Munich, Munich, Germany, in 1998, and the 

Ph.D. degree in MEMS from the Royal Institute of 

Technology (KTH), Stockholm, Sweden, in 2002. 

He was working as a Consultant to industry and 

as a Visiting Scholar at Rensselaer Polytechnic Institute, 

Troy, NY, where he was working with 3-D IC 

technologies. He is currently an Associate Professor 

in the Microsystem Technology Group, KTH, where 

he is the Team Leader for 3-D IC integrated MEMS 

and wafer-level packaging activities.

packaging - School of Electrical Engineering

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