mitac w130.pdf - tim.id.au

5 Connector and Switch Definition
Table 5-1 D/D Board Connector (J3) Pin Assignments
Pin Name Pin No Description
VDOCK 1,3,5,7
AC Adapter input(From Docking BD to D/D BD), 19Vdc, max. 3.16A
input.
VMAIN 19,21,23,25
CPU Vdc, Max. 25W Output, +12.6~+19Vdc, Ripple & Noise below
1%.
VDD5 35 Uninterrupt +5Vdc, Max. 100mA, +4.75~+5.25Vdc
+12V 37
+12Vdc, Max. 120mA Output, +11.4~+12.6Vdc, Ripple & Noise below
1%.
+5V 27,29,31,33 +5Vdc, Max. 3A Output, +4.75~+5.25Vdc, Ripple & Noise below 1%.
+3V 9,11,13,15,17
+3Vdc, Max. 3A Output, +3.135~+3.465Vdc, Ripple & Noise below
1%.
BAT_TEST 49 TEST Battery on boot to charge and discharge states
DC_IN 43 AC adapter input power present, HI active, TTL output.
D/BAT/CHG# 47 Detect Battery charge states
BAT_DEAD 45
Primary Battery Power reach to Dead level, (Battery power can’t keep
the 12/5/3V output). High active, TTL output.
VBAT 41
Reflect the current Primary Battery Voltage for host Primary Battery
low detects.
SMC_H8 44
Smart battery clock signal of Primary Battery, pass from Primary
Battery.
SMD_H8 46
Smart battery data signal of Primary Battery, pass from Primary
Battery.
PWR_ON 48 Turn on +12/+5/+3Vdc output, high active, TTL output.
POWERBTN# 50 Power Button Signal,Low avtive.
KBGPIO1,2 39,40 KB Backlight control GPIO pin
GND
2,4,6,8,10,12,14,16
,18,20,22,24,26,28
,30,32,34,36,38,40
Ground
Table 5-2 HD Connector (J501) Pin Assignment
Pin Name Pin No Description
IDEPD0 17 IDE Device data 0
IDEPD1 15 IDE Device data 1
IDEPD2 13 IDE Device data 2
IDEPD3 11 IDE Device data 3
IDEPD4 9 IDE Device data 4
IDEPD5 7 IDE Device data 5
IDEPD6 5 IDE Device data 6
IDEPD7 3 IDE Device data 7
IDEPD8 4 IDE Device data 8
IDEPD9 6 IDE Device data 9
IDEPD10 8 IDE Device data 10
IDEPD11 10 IDE Device data 11
IDEPD12 12 IDE Device data 12
IDEPD13 14 IDE Device data 13
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