The Red Brick Wall of Traditional Semiconductor Electronics The ...

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Material Solution: Suppression of Boron Outdiffusion by Carbon SiGe B concentration BORON Annealing Depth (nm) Depth (nm) SIMS investigations on real devices SiGe:C B concentration
SUMMARY: Dopant Diffusion in Si SiGe SiGe:C Ge:C :C Model of C outdiffusion provides quantitative description – Coupled diffusion of C and Si point defects Suppressed B diffusion due to C incorporation – Interstitial undersaturation due to C outdiffusion – diffusivity reduction of ~20 for < 10 20 cm -3 C C suppresses also transient enhanced diffusion (TED) during damage annealing Boron and phosphorous diffusion is suppressed by C – Interstitial-mediated dopant diffusion Antimony and arsenic diffusion is enhanced by C – Vacancy-mediated dopant diffusion
Page 1 and 2: The Red Brick Wall of Traditional S
Page 3 and 4: “I think there is a world market
Page 5 and 6: Silicon Wafer Today
Page 7 and 8: Electronics, Vol. 38, Nr. 8, April
Page 9 and 10: CPU MHz Trend MHz 1000 100 10 8080
Page 12: Semiconductor End Markets 2003 12%
Page 15 and 16: What is the „ „Best“ est“ T
Page 17 and 18: It is revolutionary time ... Proce
Page 19 and 20: Moore‘s Law Law: : New Materials
Page 21 and 22: Moore’s Law today today: : New Ca
Page 23 and 24: HBT: Bor Boron on Outdiffusion - th
Page 25: Boron Outdiffusion: The Problem Con
Page 29 and 30: Modular Integration: BiCMOS ffor fo
Page 32 and 33: Prognosis …. “There is no reaso
Page 34 and 35: The ITRS Consortium onsortium TWG M
Page 36 and 37: The latest ITRS Roadmap ( (selected
Page 38 and 39: Ultrathin Gate oxide oxide: : 30 nm
Page 40 and 41: Alternatives Needed: thicker gate d
Page 42 and 43: Search for Suitable Binary Oxides H
Page 44 and 45: Praseodym Praseodymium ium Oxid Oxi
Page 46 and 47: Epita Epitaxial xial Growth of Hete
Page 48 and 49: Relaxed Layer ( (Misfit Misfit Disl
Page 50 and 51: Band Gap for Strained SiGe and sili
Page 52 and 53: Strain and Carrier Mobility Normali
Page 55 and 56: Scaling will go on
Page 57 and 58: Material Complexity is Compounding
Page 59 and 60: Revolutionary Changes LOW K DIELEC
Page 61 and 62: Power Density Continues to Get Wors
Page 63 and 64: Lithography: Yesterday, Today, and
Page 65 and 66: CPU Multi Multi-layer layer Metal I
Page 67 and 68: RC Delay Assumption Assumption: : t
Page 69 and 70: Groups of Low Low-K Materials Reduc
Page 71 and 72: Cost of a Chip Factory “Second Mo
Page 73 and 74: $35 $30 $25 $20 $15 $10 $5 $0 Intel
Page 75 and 76: Mega Business Trends Cost of Fab,
Page 77 and 78:
Growth of the Internet Mill. 10000
Page 79 and 80:
Web Tablet
Page 81 and 82:
Other New Concepts (here: Memories)
Page 83:
New Device Concepts Gate Oxide Body
Page 86 and 87:
Scaling will reach physical limits
Page 88:
Summary Innovations on all levels
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