Library manual XBTGC Expert I/O High speed counting | 3 MB
Library manual XBTGC Expert I/O High speed counting | 3 MB
Library manual XBTGC Expert I/O High speed counting | 3 MB
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1-Phase HSC Counter<br />
Overview<br />
Introduction<br />
The 1-Phase HSC uses one hardware input as a counter input. When there is a<br />
pulse signal on the input, it can be a:<br />
count-up counter, or,<br />
count-down counter<br />
Configure the 1-Phase HSC using the modes available via the HSC Configuration<br />
screen (see page 45).<br />
1-Phase HSC Modes Overview<br />
Up/Rising edge Counter (see page 31)Mode:<br />
The counter counts up at each rising edge of the input.<br />
Down/Rising edge Counter (see page 32) Mode:<br />
The counter counts down at each rising edge of the input.<br />
Up/Falling edge Counter (see page 33) Mode:<br />
The counter counts up at each falling edge of the input.<br />
Down/Falling edge Counter (see page 34) Mode:<br />
The counter counts down at each the falling edge of the input.<br />
1-Phase HSC Specification<br />
Specification of this counter is described in the 1-Phase HSC Specification<br />
(see page 35).<br />
30 04/2012