Library manual XBTGC Expert I/O High speed counting | 3 MB
Library manual XBTGC Expert I/O High speed counting | 3 MB
Library manual XBTGC Expert I/O High speed counting | 3 MB
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2-Phase HSC Counter<br />
Mode 3<br />
Mode 3 Description<br />
The following diagram shows the behavior of the 2-Phase HSC using mode 3 (2-<br />
Phase*2):<br />
Input 1A<br />
Input 1B<br />
Counter<br />
Value<br />
Off Preset<br />
ON Preset<br />
Synchronized<br />
ouput<br />
The HSC counts up in the rising and falling edge when input 1A comes before input<br />
1B. The HSC counts down in the rising and falling edge when input 1A comes after<br />
input 1B.<br />
The following table provides the 2-Phase HSC behavior for inputs 1A and 1B:<br />
Input 1A Input 1B Counter Behavior<br />
1 (<strong>High</strong>) Rising edge Counts up<br />
0 (Low) Falling edge<br />
0 (Low) Rising edge Counts down<br />
1 (<strong>High</strong>) Falling edge<br />
All other combinations All other combinations Does not count<br />
42 04/2012
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