PXS30 Microcontroller Data Sheet - Freescale Semiconductor

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Package pinouts and signal descriptions 28 Ball Number J11 VSS_LV_COR VSS_LV T16 VSS_LV_COR VSS_LV J12 VSS_LV_COR VSS_LV T17 VSS_LV_COR VSS_LV J13 VSS_LV_COR VSS_LV U7 VSS_LV_COR VSS_LV J14 VSS_LV_COR VSS_LV U8 VSS_LV_COR VSS_LV J15 VSS_LV_COR VSS_LV U9 VSS_LV_COR VSS_LV J16 VSS_LV_COR VSS_LV U10 VSS_LV_COR VSS_LV J17 VSS_LV_COR VSS_LV U11 VSS_LV_COR VSS_LV K7 VSS_LV_COR VSS_LV U12 VSS_LV_COR VSS_LV K8 VSS_LV_COR VSS_LV U13 VSS_LV_COR VSS_LV K9 VSS_LV_COR VSS_LV U14 VSS_LV_COR VSS_LV K10 VSS_LV_COR VSS_LV U15 VSS_LV_COR VSS_LV K11 VSS_LV_COR VSS_LV U16 VSS_LV_COR VSS_LV K12 VSS_LV_COR VSS_LV U17 VSS_LV_COR VSS_LV K13 VSS_LV_COR VSS_LV W4 VSS_LV_PLL VSS_LV K14 VSS_LV_COR VSS_LV AC19 VSS_HV_PMU VSS_LV K15 VSS_LV_COR VSS_LV D5 RESERVED VSS_HV K16 VSS_LV_COR VSS_LV AB20 RESERVED VSS_HV K17 VSS_LV_COR VSS_LV 2.2.3 System pins Table 5. 473 MAPBGA supply pins (continued) Ball Name Pad Type Ball Number Table6. 473MAPBGA Balls not populated on package E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 F5 F19 G5 G19 H5 H19 J5 J19 K5 K19 L5 L19 M5 M19 N5 N19 P5 P19 R5 R19 T5 T19 U5 U19 V5 V19 W5 W6 W7 W8 W9 W10 W11 W12 W13 W14 W15 W16 W17 W18 W19 Table 7 shows the system pins for the PXS30 in the 257 MAPBGA package. Table 8 shows the system pins for the PXS30 in the 473 MAPBGA package. PXS30 Microcontroller Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Ball Name Pad Type Freescale Semiconductor
Ball Number Ball Name Table 7. 257 MAPBGA system pins Weak pull during reset Safe Mode default condition PXS30 Microcontroller Data Sheet, Rev. 1 Package pinouts and signal descriptions Pad Type Power Domain C4 FCCU_F[1] disabled not available GP Slow/Medium VDD_HV_IO C10 JCOMP pull down not available GP Slow VDD_HV_IO E1 Nexus MDO[0] 1 NOTES: 1 Do not connect pin directly to a power supply or ground. — not available GP Slow/Fast VDD_HV_IO E4 NMI pull up not available GP Slow VDD_HV_IO L15 TCK pull up not available GP Slow VDD_HV_IO M16 TMS pull up not available GP Slow VDD_HV_IO N1 XTALIN — not available Analog Feedthrough VDD_HV_IO P2 RESET pull down not available Reset VDD_HV_IO R1 XTALOUT — not available Analog Feedthrough VDD_HV_IO R2 FCCU_F[0] disabled not available GP Slow/Medium VDD_HV_IO R13 VREG_CTRL — — Analog Feedthrough VDD_REG U12 VREG_INT_ENABLE — — Analog Feedthrough VDD_HV_IO U13 RESET_SUP pull down — Analog Feedthrough VDD_HV_IO Ball Number Ball Name Table 8. 473 MAPBGA system pins Weak pull during reset Safe Mode default condition Pad Type Power Domain C4 FCCU_F[1] disabled not available GP Slow/Medium VDD_HV_IO D10 JCOMP pull down not available GP Slow VDD_HV_IO E1 Nexus MDO[0] 1 — not available GP Slow/Fast VDD_HV_IO E4 NMI pull up not available GP Slow VDD_HV_IO R23 dramc CLKB — — DRAM CLK VDD_HV_DRAM T23 dramc CLK disabled — DRAM CLK VDD_HV_DRAM W1 XTALIN — not available Analog Feedthrough VDD_HV_IO Y2 RESET pull down not available Reset VDD_HV_IO Y19 TCK pull up not available GP Slow VDD_HV_IO AA1 XTALOUT — not available Analog Feedthrough VDD_HV_IO AA2 FCCU_F[0] disabled not available GP Slow/Medium VDD_HV_IO AB19 TMS pull up not available GP Slow VDD_HV_IO AC18 VREG_CTRL — — Analog Feedthrough VDD_REG AC20 RESET_SUP pull down — Analog Feedthrough VDD_HV_IO AC21 VREG_INT_ENABLE — — Analog Feedthrough VDD_HV_IO NOTES: 1 Do not connect pin directly to a power supply or ground. Freescale Semiconductor Preliminary—Subject to Change Without Notice 29
Page 1 and 2: Freescale Semiconductor Data Sheet:
Page 3 and 4: Modules Analog-to-Digital Converter
Page 5 and 6: PXS30 Block Diagram PMU SWT MCM STM
Page 7 and 8: PXS30 Microcontroller Data Sheet, R
Page 9 and 10: 1.5.6 Frequency-Modulated Phase-Loc
Page 11 and 12: • DDR 1 • DDR 2 (optional) •
Page 13 and 14: 1.5.16 FlexCAN • Thirty-two messa
Page 15 and 16: — External ADC input, taking into
Page 17 and 18: • Collection of test results •
Page 19 and 20: 2 Package pinouts and signal descri
Page 21 and 22: Figure 5. PXS30 473 MAPBGA pinout (
Page 23 and 24: Ball Number Table 3. 257 MAPBGA sup
Page 25 and 26: Ball Number Table 5. 473 MAPBGA sup
Page 27: Ball Number Table 5. 473 MAPBGA sup
Page 31 and 32: Freescale Semiconductor Preliminary
Page 71 and 72: 15 V DD_HV_ADV SR ADC supply voltag
Page 73 and 74: 3.4 Thermal characteristics Table 1
Page 75 and 76: See Section 6, Reference documents,
Page 77 and 78: 3.8.2 PMC board schematic and compo
Page 79 and 80:
3.11 Main oscillator electrical cha
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3.13 16 MHz RC oscillator electrica
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PXS30 Microcontroller Data Sheet, R
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Page 87 and 88:
3.15 Flash memory electrical charac
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3.16 SRAM memory electrical charact
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3.17.2 GP pads AC specifications No
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Table 38. Drive Current, V DD_HV_PD
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Table 42. PDI pads AC electrical sp
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— All inputs are tolerant up to t
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NOTES: 1 L H signifies low-to-high
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Table 55. Output drive current @ V
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3.21.1 Reset sequence duration PXS3
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Reset Sequence Trigger Reset Sequen
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3.21.4 Reset sequence—start condi
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3.21.4.3 external Reset via RESET P
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Table 61. DDR and DDR2 (DDR2-400) S
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NOTES: 1 fTCK =1/t TCK. f TCK needs
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Figure 38. Nexus output timing 3.22
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SS SCK Input (CPOL=0) SCK Input (CP
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SS SCK Input (CPOL=0) SCK Input (CP
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3.22.8 Fast ethernet interface Tabl
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3.22.8.3 MII async inputs signal ti
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No. Symbol Parameter 6 t COV CC D_C
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D_CLKOUT Input Bus Input Signal ipg
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SCL 1 SDA 3.22.11 LINFlex timing Th
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Figure 61. 257 MAPBGA mechanical da
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Figure 63. 473 MAPBGA package mecha
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5 Orderable parts Qualification sta
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PXS30 Microcontroller Data Sheet - Freescale Semiconductor

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