Half-Bridge LLC Resonant Converter Design Using FSFR-Series ...

AN-4151 APPLICATION NOTE
RMS
ID I
(27)
o
4
Meanwhile, the ripple current flowing through output
capacitor is given as:
2
RMS Io2 2 8
Co ( ) o o
I I I
(28)
2 2
8
The voltage ripple of the output capacitor is:
Vo Io R
(29)
C
2
where RC is the effective series resistance (ESR) of the
output capacitor and the power dissipation is the output
capacitor is:
P . ( I ) R
(30)
RMS 2
Loss Co Co C
(Design Example) The voltage stress and current
stress of the rectifier diode are:
VD 2( Vo VF) 2(240.9) 49.8
RMS
ID Io 6.28A
4
The 100V/20A Schottky diode is selected for the
rectifier considering the voltage overshoot caused by
the stray inductance.
The RMS current of the output capacitor is:
2
RMS Io2 2 8
ICo ( ) Io Io 3.857A
2 2
8
When two electrolytic capacitors with ESR of 80mΩ
are used in parallel, the output voltage ripple is given
as:
0.08
Vo IoRC 8 ( ) 0.50V
2 2 2
The loss in electrolytic capacitors is:
RMS 2 2
PLoss. Co ( ICo) RC3.857 0.04 0.60W
[STEP-10] Control Circuit Configuration
Figure 24 shows the typical circuit configuration for RT pin
of FSFR-series, where the opto-coupler transistor is
connected to the RT pin to control the switching frequency.
The minimum switching frequency occurs when the optocoupler
transistor is fully tuned off, which is given as:
5.2k
fmin 100( kHz)
(31)
Rmin
Assuming the saturation voltage of opto-coupler transistor is
0.2V, the maximum switching frequency is determined as:
5.2k4.68k fmax ( ) 100( kHz)
(32)
R R
min max
Control
IC
© 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com
Rev. 1.0.1 • 5/15/12 12
R max
R min
External S/S
R SS
C SS
RT
LVcc
VDL
SG PG
Figure 24. Typical Circuit Configuration for RT Pin
Soft-start: To prevent excessive inrush current and
overshoot of output voltage during start-up, increase the
voltage gain of the resonant converter progressively. Since
the voltage gain of the resonant converter is reversely
proportional to the switching frequency, the soft-start is
implemented by sweeping down the switching frequency
from an initial high frequency (f ISS ) until the output
voltage is established as illustrated in Figure 25. The softstart
circuit is made by connecting RC series network on
the RT pin as shown in Figure 24. FSFR-series also has an
internal soft-start for 3ms to reduce the current overshoot
during the initial cycles, which adds 40kHz to the initial
frequency of the external soft-start circuit, as shown in
Figure 25. The actual initial frequency of the soft-start is
given as:
ISS 5.2k5.2k f ( ) 100 40 ( kHz)
(33)
R R
min
It is typical to set the initial frequency of soft-start (f ISS ) as
2~3 times of the resonant frequency (fo).
The soft-start time is determined by the RC time constant:
T 3~4timesof
R C (34)
f ISS
f s
3ms
40kHz
SS
SS SS SS
3~4 times of RC time constant
Control loop
take over
Figure 25. Frequency Sweep of the Soft-start
time