Computer Systems Organization and Architecture
Computer Systems Organization and Architecture
Computer Systems Organization and Architecture
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Errata for<br />
<strong>Computer</strong> <strong>Systems</strong> <strong>Organization</strong><br />
<strong>and</strong> <strong>Architecture</strong><br />
(Second Printing)<br />
By John D. Carpinelli<br />
Updated May 21, 2002
Chapter 1<br />
Location Error Correction<br />
Figure 1.11(c), p. 19 Next to last line:<br />
“1 0 0 | 1 0 1 0”<br />
Should be “1 0 0 | 0 0 1 0”<br />
Chapter 2<br />
Location Error Correction<br />
Problem 17, p. 94 “of Figure 2.28” Should be “of Figure 2.27”<br />
Chapter 3<br />
No errors reported to date.<br />
Chapter 4<br />
No errors reported to date.<br />
Chapter 5<br />
Location Error Correction<br />
Sec. 5.3.1, p. 192 S6+S7: V ? 000,<br />
C ? 0<br />
Should be S6+S7: V ? 0, C ? 1<br />
Chapter 6<br />
Location Error Correction<br />
Table 6.6, p. 250 JPNZY <strong>and</strong> JPNZN<br />
states<br />
Chapter 7<br />
Ignore large brackets <strong>and</strong> all text to their<br />
right<br />
Location Error Correction<br />
Figure 7.8, p. 287 2 near IR Should be 4<br />
Table 7.16, p. 291 AC ? /AC´ Should be AC ? AC´<br />
Chapter 8<br />
Location Error Correction<br />
Figure 8.6, p. 323 Y-1 control signals LD = 3; CLR = 1<br />
Figure 8.9, p. 333 LD signal for U C should be C´<br />
011 in register i Should be data input to state counter
Chapter 9<br />
No errors reported to date.<br />
Chapter 10<br />
Location Error Correction<br />
Figure 10.5, p. 429 Lines between<br />
source <strong>and</strong><br />
destination devices<br />
missing labels<br />
Figure 10.9, p. 437 Label “INPT” on<br />
decoder output 0<br />
Chapter 11<br />
No errors reported to date.<br />
Chapter 12<br />
No errors reported to date.<br />
From top to bottom, labels should be<br />
“Data”, “Data Ready”, <strong>and</strong> “Data<br />
Acknowledge”<br />
Should be IINPT