HOT167-1
HOT167-1
HOT167-1
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Infineon Technologies Corp.<br />
June 99<br />
Four Stage Instruction Pipeline<br />
100ns effective instruction execution time<br />
Three word pre-fetch queue (bus controller) to support pipeline<br />
Optimized branch processing<br />
For branch instruction (Jump, Cond. Jump, Call, Return,...) only one<br />
additional machine cycle is normally required to fetch target<br />
instruction<br />
Jump Cache<br />
For loop processing no additional machine cycle is required<br />
Fetch<br />
Decode<br />
Execute<br />
Write Back<br />
1. Instr. 2. Instr. 3. Instr. 4. Instr.<br />
1 Machine Cycle = 100 ns at 20 MHz CPU clock<br />
<strong>HOT167</strong>-1 Version 2.0<br />
Time<br />
22
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