HOT167-1

Infineon Technologies Corp. 

June 99 

HOT167-1 

A Hands-On Introduction to the C167CR/CS 

using DAvE, the kitCON-167CR/CS Starter Kit, 

Keil µVision2, and an oscilloscope 

This version is based on DAvE Version 1.0, Keil µVision2 V2.0, 

Keil C166 tool chain V4.0, 16-bit Starter Kit CD ROM V4.1. 

Please report any errors to axel.wolf@infineon.com 

HOT167-1 Version 2.0 

1


June 99 

Contents (I) 

Introduction 

• Introduction to HOT167-1 

HOT Overview 

Short Introduction to DAvE 

Short Introduction to Keil µVision2 


2


June 99 

Contents (II) 

C166 Architectural Overview 

C166 - A Modular Architecture 

16 bit Roadmap 

C167CR/CS Block Diagram 

C166 CPU Core 

Internal & External Memory 

Interrupt System, PEC 

C167CR/CS Peripheral Overview 


RAM 

1KByte 

RAM 

1KByte 

PWM 

ADC 

SAB-C167CR 

XRAM 

XRAM 

1KByte 

1KByte 

CAN 

BUS- 

CONTROL 

CORE 

ROM 

INTERRUPT 

IR+PEC- 

UNIT 

CONTROL 

CAPCOM 

SSC 

WDT 

1+2 

GPT 

USART 

1+2 

3


June 99 

Introduction to HOT167-1 

HOT167-1 is a Hands-On Training material created for the 

C167CR/CS, using 

the kitCON-167CR/CS Starter Kit 

the Keil µVision2 integrated development environment (IDE) 

including the C166 compiler, A166 Assembler, L166 Linker/Locator 

and Debugger 

DAvE, the Digital Application Engineer from Infineon 

Microcontrollers 

an oscilloscope (for visualization purposes). 

A Windows95/98 or Windows NT PC (to be able to run DAvE) 

HOT167-1 shows the user from the scratch how to generate 

software for the C167CR/CS with DAvE and the Keil tool chain: 

There are several exercises included, small tasks to be solved 

using every peripheral of the C167CR/CS. 

The user creates a new project in DAvE and configures the device, 

following the detailed instructions. 


5


June 99 

Introduction to HOT167-1 (cont.) 

After having generated the code, the user 

- switches to Keil µVision2, 

- creates a new project (or uses a pre-configured project), 

- includes the C files created by DAvE and the assembler startup 

file, 

- adds some User Code, 

- compiles, assembles, links and locates the project. 

After compilation with µVision2, the user 

- switches to the integrated debugger 

- connects to the kitCON-167CR/CS via bootstrap loader 

(loading the monitor), 

- loads, starts and debugs his example, 

- confirms his working program with a scope (screen shots are 

included for most of the examples). 

The first HOT167-1 example shows the user from the scratch how 

to generate software with the used tool chain, including the setup of 

the µVision2 project. The following examples are based on an 

already prepared µVision2 project. 


6

Name of Hands-On-Training 


June 99 

HOT161-2 (C161O) 

HOT Overview (cont.) 

Compiler, Assembler, Linker, Locator 

Keil µVision2 

(Keil C166, 

A166, L166) 

- 

Tasking EDE 

(Tasking C166, 

A166, L166) 

X 


C166 Tools used 

Keil 

Debugger in 

µVision2 

- 

Debugger 

Tasking 

CrossView Pro 

HOT161CI-2 - 

X - 

X 

HOT163-2 - 

X - 

X 

HOT164-2 - 

X - 

X 

HOT165-2 - 

X - 

X 

HOT167-2 - 

X - 

X 

X 

8


June 99 

Short Introduction to DAvE 

DAvE is your Digital Application Engineer from Infineon 

Microcontrollers. 

DAvE can help you compare and evaluate the different members of 

the Infineon C500 (8-Bit) and C166 (16-Bit) families of 

microcontrollers and help you find the right chip for your 

embedded control application. 

DAvE can be your one-stop access point to all standard 

knowledge associated with Infineon embedded technology 

expertise by offering you context sensitive access to user's 

manuals, data sheets, application notes etc. directly in your 

development environment. 

DAvE can help you program the Infineon microcontroller you want 

to use in your project, by offering you intelligent wizards that help 

you configure the chip to work the way you need it and 

automatically generate C-level templates with appropriate access 

functions for all of the on chip peripherals and interrupt controls. 

More DAvE info at www.infineon.com/DAvE.html 


9


June 99 

Short Introduction to the Keil µVision2 

Integrated Development Environment 

Keil µVision2: 

µVision2, the IDE from Keil Software, combines Project 

Management, Source Code Editing, and Program Debugging in one 

powerful environment. The Quick Start guide on the starter Kit CD 

ROM gives you the information necessary to use µVision2 for your 

own projects. It provides a step-by-step introduction of the most 

commonly used µVision2 features including: 

- Project Setup for the Make and Build Process 

- Editor facilities for Modifying and Correcting Source Code 

- Program Debugging and Additional Test Utilities 

More information is available on the Starter Kit CD ROM or at 

www.keil.com. 


10


June 99 

C166 Architectural Overview 

RAM 

1KByte 

RAM 

1KByte 

PWM 

ADC 

SAB-C167CR 

XRAM 

1KByte 

CAN 

BUS- 

CONTROL 

CORE 

XRAM 

1KByte 

ROM 

INTERRUPT 

IR+PEC- 

UNIT 

CONTROL 

CAPCOM 

SSC 

WDT 

1+2 

GPT 

USART 

1+2 


C166 - A Modular 

Architecture 

16 bit Roadmap 

C167CR/CS Block 

Diagram 

C166 CPU Core 

Internal & External 

Memory 

Interrupt System 

PEC 

C167CR/CS Peripheral 

Overview 

11


June 99 

Four Bus Modular System 

Flash 

64K 

Flash 

32K 

Flash 

128K 

New 

Modules 

OTP 

64K 

ROM 

8K 

ROM 

32K 

New 

Modules 

ADC 

CAPCOM 

SSP 

32 bit 

XBusModules 

I²C 

Timers USART SSC 

WDT 


XRAM 

16 - b i t 

Core 

16 - b i t 

New 

Modules 

Ports 

CAN 

2x16 bit 

Basic Library Modules 

New 

Modules 

RAM 

1k 

RAM 

1k 

New 

Modules 

13

High-Integration 

General Purpose 

Low-Cost 


June 99 

16-bit Roadmap 

* 16 M Address Range 

*2/4KByteRAM 

*32CAPCOM 

*4PWM 

* 2 Serial Interface 

*5Timer 

* Chip Selects 

Benefits in System 

Integration 

* Extensive I/O 

Balanced Peripheral 

set for a broad 

Application Ranges: 

*1K/2KBRAM 

*ROM/Flash/OTP 

* Different RAM Size 

* 16 M Addr. Range 

* 3/5 16-bit Timers 

* Serial i/f SSP, SSC 

* Reduced Chip Selects 

* Wide Ext. Bus Support 

* 3 V Options 

C167 

*2KBRAM 

* CAPCOM 

*PWM 

* Serial Interfaces 

*Timer 

* 10-bit / 8bit ADC 

* Full Bus Support/ 

MUX Bus only 

C165 

*2KBRAM 

*3V 

* P-MQFP-100 

* P-TQFP-100 

C167SR 

*2KBRAM 

*PLL 

C163 


8xC166 

*1KBRAM 

* 32KB ROM 

* 32KB Flash 

* P-MQFP-100 

C167CR 

*CAN 

*4KRAM 

*PLL 

C161V/K/O 

*25MHzOption 

*1KBRAM 

*SSP 

*3V 

* Red. Peripherals 

* P-TQFP-100 

* 16MHz CPU 

* 4 M address 

*1-2KBRAM 

* P-MQFP-80 

C164CI 

C167CS 

*2xCAN 

* 11K RAM 

* 256K FLASH 

*PLL 

* Power Management / RTC 

*2KBRAM 

* 64KB OTP/ROM/Flash 

* Full-CAN 2.0B 

* Power Management / RTC 

* Motor Control Peripheral 

* P-MQFP-80 

C161RI 

*3KBRAM 

*Pwr.Man./RTC 

*I 2 C Interface 

*ADC 

C161xx 

* Large RAM 

* Large Flash 

*Pwr.Man./RTC 

*I 2 C Interface 

* CAPCOM 

*2USARTs 

* CAN / J1850 

*ADC 

14


June 99 

C166 Part Numbering Scheme 

(at the example of the C167 Products) 

Prefix Temp. Range Type Memory Memory Package 

Designation Size Type Type 

SA 

B,F C167 (-) ROMLess 

L M 

B C167S 4 

Mask ROM 

R M 

B,F,K C167SR 32KBytes 

(-) L M 

B, F, K C167CR 

4 R M 

(-) L M 

B= 0/ 70 °C 

F= -40/ 85 °C 

K= -40/125 °C 

C= CAN Interface M= Metric Quad Flatpack 


Flash 

B C167CR 16 F M 

128KBytes 

B, F,K C167CR 16 R M 

B, F,K C167CS 32 F M 

15


June 99 

XTAL 

8 

8 

16 

C167 Block Diagram 

Port 4 

Port 6 

Port 0 

128 KByte 

ROM/ 

EPRON 

FLASH 

PLL 

OSC 

CAN 

2.0 B active 

2K XRAM 

XBUS (16-bit NON MUX Data / Addresses) 

Instr./Data 

32 

External Bus, 

XBUS Control, 

5 * CS Logic 

External Instr./Data 

16 

MultiFunctional 

10-Bit 


C166-Core 

CPU 

Interrupt Controller 

USART Sync. 

ADC 

16 Channels 

Channel 

(SPI) 

ASC SSC 

BRG BRG 

GPT1 

T2 

T3 

T4 

Interrupt Bus 

Peripheral Data 

GPT2 

Port 1 Port 5 Port 3 Port 2 Port 8 Port 7 

T5 

T6 

PEC 

36 ext. IR 

Timer 7 Timer 1 

CAPCOM1, 2 

32 

Channels 

Timer 0 

Timer 8 

Dual Port 

PWM Module 

PT 1 

PT 2 

PT 3 

PT 4 

16 16 15 16 8 8 

Data 

Data 

16 

16 

RAM 

2KByte 

Watchdog 

16 

167CR 

16


June 99 

XTAL 

8 

8 

16 

C167CS Block Diagram 

Port 4 

Port 6 

Port 0 

256 

KByte 

FLASH 

PLL 

OSC 

2xCAN 

2.0 B active 

4K XFlash 

8K XRAM 

XBUS (16-bit NON MUX Data / Addresses) 

Instr./Data 

32 

External Bus, 

XBUS Control, 

5 * CS Logic 

External Instr./Data 

16 

MultiFunctional 

10-Bit 


C166-Core 

CPU 


USART Sync. 

Channel 

ADC 

(SPI) 

24 Channels 

ASC SSC 

BRG BRG 

GPT1 

T2 

T3 

T4 

Interrupt Bus 

Peripheral Data 

GPT2 

Port 1 Port 5 Port 3 Port 2 Port 8 Port 7 

T5 

T6 

PEC 

36 ext. IR 

Timer 7 Timer 1 

CAPCOM1, 2 

32 

Channels 

Timer 0 

Timer 8 

Dual Port 

PWM Module 

PT 1 

PT 2 

PT 3 

PT 4 

16 16 15 16 8 8 

Data 

Data 

16 

16 

RAM 

3KByte 

Watchdog 

RTC 

16 

167CR 

17


June 99 

Architectural Overview 

Complete 16-bit architecture with 32-bit bus to the internal ROM 

single-cycle 16-bit and 32-bit (MUL/DIV) operations 

20 MHz CPU clock results in an instruction cycle time of 100ns 

allows zero wait-state 70ns external bus access time 

Avoids accumulator bottlenecks 

16 General Purpose Register (GPR) implemented 

Up to 16 GPRs form a register bank 

Any register bank can be freely located in internal RAM 

Easy efficient programming supported by powerful instructions 

combined with complex addressing modes 

Transparent programming of on-chip peripherals via 

Special Function Register (SFR) interface 


18


June 99 

General Purpose Register 

(GPR) 

Up to 16 GPRs = 1 Register bank 

Consisting of max. 

8 Word-Registers 

8 Word-Registers with lower and higher Byte access 

The GPRs are bit-addressable 

Any Register bank can be freely allocated in internal RAM 

The location of the active Register bank is determined by Context 

Pointer (CP) 

CP can be easily switched to select another Register bank by 

using the Switch Context instruction (one instruction cycle) 


20


June 99 

Block Diagram 

ROM / RAM interaction with 2K* Internal RAM 

RH7 

RH6 

RH5 

RH4 

RH3 

RH2 

RH1 

RH0 

R15 

R14 

R13 

R12 

R11 

R10 

R9 

R8 

Stackpointer Underflow 

Stackpointer 

Stackpointer Overflow 

RL7 

RL6 

RL5 

RL4 

RL3 

RL2 

RL1 

RL0 

STKUV 

STKOV 

R7 

R6 

R5 

R4 

R3 

R2 

R1 

R0 

* C167CS has 3KBytes of internal RAM 


2*KBytes 

internal RAM 

R15 

R0 

0FDFE 

0FC00 

0F600 

Context pointer 

STKUV 

STKOV 

21


June 99 

Four Stage Instruction Pipeline 

100ns effective instruction execution time 

Three word pre-fetch queue (bus controller) to support pipeline 

Optimized branch processing 

For branch instruction (Jump, Cond. Jump, Call, Return,...) only one 

additional machine cycle is normally required to fetch target 

instruction 

Jump Cache 

For loop processing no additional machine cycle is required 

Fetch 

Decode 

Execute 

Write Back 

1. Instr. 2. Instr. 3. Instr. 4. Instr. 

1 Machine Cycle = 100 ns at 20 MHz CPU clock 


Time 

22


June 99 

Instruction Set 

Data manipulation 

Arithmetic and boolean instruction incl. fast multiply/divide in 

0.5/1.0µs at 20 MHz 

Multiple (up to 15) bit shift and rotate in 100ns 

Bit to bit manipulation in internal RAM and SFR’s 

Data movement 

MOV instructions with all important addressing modes 

Byte to word conversion 

System stack (PUSH, POP) with over and underflow control 

User stack (MOV with auto increment and decrement) 


23


June 99 

Address Space (cont.) 

Flexible ext. bus configurations to simplify system integration 

up to 24-bit Address / 8-bit Data (MUX and NMUX) 

up to 24-bit Address / 16-bit Data (MUX and NMUX) 

5 completely independent configuration registers 

5 programmable chip selects and programmable bus control signals 

- saves external glue-logic 

Programmable HOLD/HOLDA/BREQ bus arbitration function for 

multi-master operations 


26

Code 

Segments 

(64K each) 

256KB 

Internal 

FLASH 


June 99 

FF’FFFF 

16 MBytes 

256 

4’FFFF 

4 

4‘0000 

3 

3‘0000 

2 

2’0000 

1 

1’0000 

0 

Internal and external Memory 

Map of the C167CS 

1024 

1023 

1022 

1021 

19 

18 

17 

16 

15 

14 

13 

12 

11 

10 

9 

8 

7 

6 

5 

4 

3 

2 

1 

0 

Data Pages 

(16K each) 

System Page (3) 

4K 

4K 

8K 

16K 

32K 


IRAM / SFR + X-Peripheral area 

28


June 99 

Data Addressing via Paging 

on the 16 Mbyte address range 

Page 

Number 

Paging with Data Page Pointer (DPP) 

15 14 13 

Selection of one 

Data Page Pointer 

DPP3 

DPP2 

DPP1 

DPP0 

10-bit 

16-bit Address 


14-bit 

Page 

Offset 

Physical 24-bit Data address 

0 

30


June 99 

Interrupt System 


Extremely short interrupt response time minimum 250ns typical: 

400ns (@20 MHz) 

Short interrupt service overhead 

Low total latency gives highest real-time performance 

Comprehensive prioritization scheme 

- Easy scheduling of complex real-time systems by using up to 

15 priority levels (with 4 groups each) 

Non-maskable interrupt input (NMI) 

Hardware traps on runtime errors and Software trap 


31


June 99 

Interrupt System (cont.) 

CPU independent interrupt-service via 

Peripheral Events Controller (PEC) 

Off-loads the CPU from simple, but frequent interrupt-services 

Interrupt-driven “DMA-like” data transfer to any location in 

segment 0, without task switch of the CPU 

Makes peripheral data transfers independent of running CPU 

routine 

Response time is minimum 150ns, typical 300ns 

with a CPU load of 100ns (@20 MHz) 


32


June 99 

Interrupt Priority System, PEC 

group 3 

(Level 0) 

group 3 

Level 1-13 

group 2 

group 3 

Level 14 

group 2 

group 3 

Level 15 

PEC 3 

group 1 

PEC 7 

group 2 

group 1 

group 2 

PEC 2 

group 0 

PEC 6 

group 1 

group 0 


PEC 5 

group 1 

PEC 1 

group 0 

group 0 

PEC 0 

PEC 4 

Level 

Group 

3 2 1 0 

15 64 

14 

13 

12 

11 

10 

9 

8 

7 

6 

5 

4 

3 

2 

1 

0 

1 

33


June 99 

INTR Flag is Set 

Peripheral Interrupt 



External Interrupt* 


External Interrupt* 

Interrupt Processing 

Interrupt Control Register of the appropriate peripheral 

Priority Check 

Comparison of 

Interrupt Priority 

with CPU 

Runtime Priority 

16 Priority Levels 

if 

higher 

Priority 

* External Interrupts are possible, e.g. instead of the Capture Input 

55 Peripheral Interrupts 


Group Check 

4 Groups 

Clear 

INTR Flag 

36 ext. Interrupts(+ NMI) including 8 which are sampled every 50 ns 

INTR Service: 

Save PSW, 

CSP, IP 

Set new priority 

in PSW. 

Set CSP, IP 

according to 

peripheral 

vector or 

Trap no. 

PEC 

Service 

34


June 99 

INTR Service: 

Save PSW, 

CSP, IP 

Set new priority 

in PSW. 

Set CSP, IP 

according to 

Peripheral 

vector or 

Trap No. 

Peripheral Event Controller 

(PEC) 

Interrupt has passed priority and group check 

Interrupt priority < 14 

Interrupt priority 14 or 15 

and Data Counter > 0 

Interrupt service PEC service 

priority & group 

check 

8 PEC 

Channel 

PEC 

Contr. Reg. 

Data Counter 

SRC Pointer 

DEST Pointer 

IR request if Data Counter = 0 


Memory Segment 0 

0FFFF 

Byte or 

Word 

Transfer 

00000 

35


June 99 

Peripherals Set of the C167CR 

(20 MHz) 

2 General Purpose Timer units (GPT1 & GPT2) 

5 Timers (200/400ns) with enhanced Input/Output, Reload and 

Capture functions and complex concatenation capabilities 

2 Capture/Compare units (CAPCOM1 & 2) 

4 Timers (400ns) with Reload register and 32 independent 16-bit 

Capture/Compare channels programmable to 6 modes of operation 

4 high resolution PWM channels 

each with independent time-base of up to 50ns resolution and 

programmable operation modes (edge-aligned, center-aligned, 

burst and single-shot mode) 

V2.0B active Full CAN Module 

Handles 29 bit and 11 bit Identifier, Maximum CAN Transfer Rate 

(1 MBit/s), 15 Message Objects with their own identifier and their 

own status and control bits, Programmable Mask Registers for 

Acceptance Filtering, Basic CAN Feature (Message Object 15, 

Equipped with two Receive Buffers and Global Mask Register) 


36


June 99 

C167CR/CS Hands-On Peripheral Training 


Exercise Overview 

How to set up the Hardand 

Software used 

Peripherals in Detail + 

Exercises 

Timer Unit 1 (GPT1) 

Timer Unit 2 (GPT2) 

PWM Unit 

CAPCOM Units 

A/D Converter 

Synchronous serial 

Channel (SSC) 

USART (ASC) 

CAN Module 1/2 

39


June 99 

Exercise Overview 

Exercise for General Purpose Timer Unit 1: 

7GPT1_1 - PWM Signal with T3 (T2, T4 for Reload) 

Exercises for General Purpose Timer Unit 2: 

7GPT2_1 - PWM Signal with T6 & CAPREL 

7GPT2_2 - Frequency Multiplication with GPT2** 

Exercises for the Pulse Width Modulation Unit: 

7PWM_1 - Two edge-aligned PWM Signals with PWM unit 

7PWM_2 - Two center-aligned PWM Signals with PWM unit 

Exercises for the Capture Compare Unit 1: 

7CC1_1 - Two edge-aligned PWM Signals with CAPCOM1 

7CC1_2 - Two center-aligned PWM Signals with CAPCOM1 

Exercises for the Capture Compare Unit 2: 

7CC2_1 - Signal Generation with CAPCOM1 - 

Signal Detection with CAPCOM2* 


40


June 99 

Exercise Overview (cont.) 

Exercises for the Analog Digital Converter 

7ADC_1 - Control the Pulse Width of a PWM signal with an 

ADC Value (using PEC transfer)** 

7ADC_2 - Control the Frequency of a 50% duty cycle PWM 

signal with an ADC Value (using the ADC ISR)** 

Exercise for the Synchronous Serial Channel SSC: 

7SSC_1 - Synchronous Serial Transmission of ADC 

Conversion Results (10 bits) at 5 Mbit/s** 

Exercise for the Asynchronous Serial Channel ASC: 

7ASC_1 - Asynchronous Serial Transmission of consecutive 

Ascii Characters at 19.2kbit/s every 10 ms 

Exercise for the CAN Module: 

7CAN_1 - Transmit a standard CAN Message with the 

On-Chip CAN Module 


41


June 99 


Exercise for the CAN Module 1 and 2 of the C167CS****: 

7CAN_2 - Transmit a standard CAN Message with the 

CAN Module 1 and receive it with CAN Module 2 

(this Exercise uses the Phytec Flash tools) 

Exercises involving more Peripherals: 

DAAD - Digital/Analog - Analog/Digital Conversion using the serial 

interface ASC0, the PWM unit, the ADC and the GPT1*** 

- running on a modified C167 Starter Kit (external resistor and 

capacitor necessary) 

- using the Phytec Flash tools 

- using the corresponding Visual Basic Interface 


42


June 99 


* : this exercise requires an external connection of two pins 

** : this exercise requires an external potentiometer 

*** : this exercise requires an external R-C filter and the 

corresponding visual basic program - 

(see section “Hints regarding the exercises - how to 

install the DAAD program”) 

**** : C167CS with CAN Module 2 not yet supported 

by DAvE V1.0 CDROM. 

See “Hints regarding DAvE.” 


43


June 99 

Exercise Overview (Table, Part I) 

Exercises 

GPT1 GPT2 PWM CC1 CC2 

7GPT1_1 

X - - - - - 

7GPT2_1 - X - - - - 

7PWM_1 - - X - - - 

7PWM_2 - - X - - - 

7CC1_1 - - - X - - 

7CC1_2 - - - X - - 

7CC2_1 - - - X X - 

7ADC_1 - - X - - X 

7ADC_2 - - X - - X 

7SSC_1 - - - - - X 

7ASC_1 X - - - - - 

7CAN_1 - - - - - - 

7CAN_2* X - - - - - 

7GPT2_2 - X X - - - 

DAAD X - X - - X 


Peripherals 

* C167CS with CAN Module 2 not yet supported by DAvE V1.0 CD ROM. See “Hints regarding DAvE.” 

ADC 

44


June 99 

How to set up your system: 

kitCON-167CR/CS HW setup 

Connect your Starter Kit board to your IBM compatible PC using a 

serial cable (connector P1 to COM1) 

Attention Windows 95 users: 

It is recommended to disable the FIFO Buffer in Settings/Control 

Panel/System/Device Manager/Ports/COM1/Port 

Settings/Advanced. 

Switch 1 of the blue DIP switches needs to be set to ON (this 

activates the bootstrap loader)* 

Attach an unregulated power supply with 8V to 12V / 500 mA to X5 

on the kitCON-167. Double check the correct polarity. The red LED 

in the power supply area will light to indicate correct power 

supply. 

Press switch S1 to perform a reset. 

* older versions of the kitCON-167 boards (without blue DIP 

switches): 

Connect jumper JP2 at 1+2 (usually a red jumper) 


46


June 99 


kitCON-167CR/CS HW setup (cont.) 

Memory Map of kitCON-167CR/CS in Bootstrap Mode: 

Data Area: 0x0FEA00 .. 0x0FEBFF 

Code Area: 0x0FEC00 .. 0x0FFFFF 

The available RAM is 0 .. 0xD8FF 

and may be used as ROM or RAM in the 

Options - Target dialog 


47


June 99 

How to set up your system: DAvE installation 

Insert the DAvE CD in your CD ROM drive. 

Run CD ROM\Setup\Setup.exe. 

Follow the setup program’s instructions. 

If you don’t have Acrobat Reader installed on your PC, do so by 

choosing to install Acrobat Reader which is included on the DAvE 

CD. 

(Hint: You need Acrobat Reader 3.0 or higher) 

Please note: 

You need WINDOWS95/98 or WINDOWS NT in order to run DAvE! 

To use DAvE 1.0 with Windows 98: 

Download and install the DAvE Service Pack 1 from 

www.infineon.com/dave.html first! 


48


June 99 

How to set up your system: Keil µVision2 

installation (Starter Kit CD 4.0 and higher) 

Insert the Starter Kit CD 4.0 or higher into your CD ROM drive. 

Wait for the Auto Start. 

(Acrobat Reader is required but also included on the CD: 

...\install\reader\) 

Go to Third Party Development Tools 

Go to Keil 

Choose the desired tool chain: 

For the current Keil Tool version: 

- click EK 166 Installation (V 4.0) + µVision2 (2.0). 

- This document assumes that the current Keil tool chain is 

installed in the default directory c:\keil\ 

For the older Keil Tools: 

- click EK 166 Installation (V 3.11) and continue with the Hands- 

On Training for the old Keil µVision (separate document). 


49


June 99 


Exercise directory structure 

If you own the Infineon Starter Kit CD ROM (V3.0 and higher): 

Copy the directory 

or 

d:\cdrom\startkit\sk_167\hot167\hot167_1\ 

d:\cdrom\startkit\sk_167cs\hot167\hot167_1\ 

and all its contents to your hard drive: 

c:\hot167_1\ 

This directory contains this pdf file and several exercise directories 

(e.g. 7gpt1_1, 7asc_1 etc.). 

These directories will be your work-directories for HOT167-1. 

If you don’t want the training tutorial itself (hot167_1) to take away 

space on your hard drive, you can erase it and use the one on the 

starter kit CD ROM. 


50


June 99 

C166 emitted file types 

Projectname . OBJ 

Unlocated object file with no absolute addresses assigned. 

Projectname . LST 

A list file containing the original source lines but with any errors or 

warnings indicated 

Projectname . SRC 

An optional file containing the assembler code generated by the 

compilation process. 

This can be assembled with A166 to produce the .OBJ file as an 

alternative to going straight to a .OBJ file from the compiler. 

Projectname . ERR 

A summary of the errors and warnings that occurred during 

compilation 


53


June 99 

Hints regarding DAvE V1.0 

To use DAvE 1.0 with Windows 98: 

Download and install the DAvE Service Pack 1 from 

www.infineon.com/dave.html first! 

To create a new Project with DAvE: 

Select “Project | New” from the pull down menu 

To generate code with DAvE: 

Select “Project | Generate Code” from the pull down menu 

To configure a peripheral: 

Move your mouse over the peripheral when DAvE shows the block 

diagram 

Click the right mouse button 

Select Configure 

To get context specific help in DAvE: 

Move your mouse over the item you want to find out about 

Click the right mouse button 

Make your choice 

Validate each alpha numeric entry by pressing ENTER 


55


June 99 

Hints regarding DAvE (cont.) 

Assembler Startup File 

DAvE also incorporates the Assembler Startup Files of the Keil and 

the Tasking Compilers. 

Whenever you do a configuration which affects this Startup file, 

DAvE is altering the Startup File for you. 

When starting a project, be sure to include the modified Assembler 

Startup File when compiling the C-code created by DAvE. 

Original Startup 

File name 

Modified Startup 

File name 


Keil C166 Tasking C166 

START167.A66 CSTART.ASM 

START.ASM START.ASM 

56


June 99 

Hints regarding DAvE V1.0 - C167CS Projects 

The DAvE CD ROM Version 1.0 as it is does not yet support the 

generation of projects for the C167CS. 

However, you can check the DAvE website 

http://www.infineon.com/dave.html 

for the C167CS Update Package. Use C167CR projects until this 

update package is available. 

As soon as it becomes available, you can download the DAvE 

C167CS module from the DAvE web site and update your DAvE on 

your hard drive: 

Go to http://www.infineon.com/dave.html 

click on “Updates for DAvE” 

select and download the update package for the C167CS 

execute the downloaded .exe-file 

after the installation you can create C167CS projects with DAvE. 


57


June 99 

Hints regarding the Exercises (cont.) 

Difference between the first exercise and the following exercises: 

The first exercise includes the creation of a µVision2 project to 

show how it works (to avoid this use c167_blank.uv2) 

The following exercises use a pre-configured µVision2 project. But 

you still have to add the necessary files (C-files generated by DAvE 

plus the Assembler Startup File START.ASM (optional)) 

The exercises are created in a way that they use only peripherals 

which have been introduced already (either directly before the 

exercise or in previous exercises) 

If an exercise does not work when running the debugger: 

Check the oscilloscope connections (right pin?) 

Check the DAvE / µVision2 configurations 

Re-generate the code with DAvE (USER CODE remains!) 

Recompile the exercise in µVision2 

Reload the exercise into the debugger and run it again 


59


June 99 

Hints regarding the Exercises: How to install 

the Visual Basic Program for exercise DAAD 

If you work from the Infineon Starter Kit CD ROM (V3.0 and 

higher): 

Close all applications. 

Copy the directory 

…\cdrom\startkit\sk_167\hot167\daad_prg\ 

to your hard drive: 

c:\daad_prg\ 

Run the program c:\daad_prg\setup.exe 

Follow the instructions on the screen. 

After the installation is completed, you can start the daad program 

with your Windows95/98 / Windows NT Start button (Start | 

Programs | daad) 


60


June 99 

Hints regarding the Exercises: How to install the 

Visual Basic Program for exercise DAAD (cont.) 

If you downloaded this file from the Infineon Web Site: 

Create a directory named c:\daad_prg\ on your hard drive. 

Download the file daad.exe from the Infineon Web Site 

(http://www.infineon.com/mc.html, branch to the Hands-On 

Training) to the new directory 

Run the program c:\daad_prg\daad.exe to unzip the files 

Run the program c:\daad_prg\setup.exe 

Follow the instructions on the screen. 

After the installation is completed, you can start the daad program 

with your Windows95/98 / Windows NT Start button (Start | 

Programs | daad) 


61


June 99 

Let’s get started now! 


62


June 99 

GPT 1 Function Diagram 

(20 MHz) 

P3.5 / T4IN 

P3.7 / T2IN 

(max. 1.25 MHz) 

P5.15/T2EUD 

P5.14/T4EUD 

P3.6 / T3IN 

(max. 1.25 MHz) 

P3.4/T3EUD 

P3.5 / T4IN 

P3.7 / T2IN 

(max. 1.25 MHz) 

P5.15/T2EUD 

P5.14/T4EUD 

Clk max 

2.5 MHz 

Clk max 

2.5 MHz 

Clk max 

2.5 MHz 

Gate 

Gate 

Gate 

Input 

Mode 

Control 

Input 

Mode 

Control 

Input 

Mode 

Control 

Run 

Enable 

Run 

Enable 

Run 

Enable 


33-bit cascaded path 

Reload 

Aux Timer T2 / T4 

up / down 

Core Timer T3 

up / down 

Capture 

Aux Timer T2 / T4 

up / down 

Toggle 

Latch 

INTR 

Flag 

Outp. 

enables 

INTR 

Flag 

INTR 

Flag 

P3.3 / 

T3OUT 

64


June 99 

Exercise 7GPT1_1 - PWM Signal with Timer 3 

(Timer 2, Timer 4 for Reload) 

Objective: Generate a PWM Signal using GPT1: 

Period: 26.2 ms 

25% pulse, 75% pause 

Use core Timer 3 to count up, enable Timer 3 output toggle latch 

(T3OTL) 

Use Timer 2 to reload Timer 3 on positive transition of T3OTL 

Use Timer 4 to reload Timer 3 on negative transition of T3OTL 


65


June 99 

Exercise 7GPT1_1 - DAvE Configurations 

Start DAvE 

Create new Project with microcontroller C167CR/CS* 

Project name: 7GPT1_1 

Select project path: c:\hot167_1\7gpt1_1 

Project Settings: 

General: 

- Select Keil Compiler, SMALL model 

System Clock: 

- External Oscillator Frequency: Set to 5 MHz 

Startup Configuration: 

- Bus Type after Reset: Set to 16 bit DEMUX 

- Write Configuration: Pin #WR and #BHE operates as #WRL 

and #WRH 

Save & close 

* C167CS not yet supported by DAvE V1.0 CD ROM. See “Hints regarding DAvE.” 


66


June 99 

Exercise 7GPT1_1 - DAvE Configurations (cont.) 

Configure GPT1: 

Auxiliary Timer 2: 

- Timer 2 Mode: Reload Timer 3 with T2 

- Input Selection: Positive transition of T3OTL 

- T2 Register: Set to 0xC000 (to generate 25% pulse) 

Core Timer 3 

- Timer 3 Mode: Timer mode 

- Timer Start: Start T3 after initialization (this will generate a 

26.2ms period of T3) 

- Alternate Output Function: enable alternate output function (use 

T3OUT) 



- Input Selection: Negative transition of T3OTL 

- T4 Register: Set to 0x4000 (to generate 75% pause) 


67


June 99 


Configure GPT1 (cont.) 

Functions: 

- Include GPT1 initialization function GT1_vInit 

Save & close 

Generate Code 


68


June 99 

Exercise 7GPT1_1 - µVision2 Configurations 

Start Keil µVision2 

Create new Project: ‘7gpt1_1.uv2’ 

Go to Project | New Project 

Browse to directory c:\hot167_1\7gpt1_1\ 

Enter file name: 7gpt1_1.uv2 

Select Target Device: 

Go to Project | Select Device for Target ‘Target 1’ 

Double-click ‘Siemens’ 

Select ‘C167CR-LM’ or ‘C167CS-32FM’ 

Click ‘OK’ 


69


June 99 

Exercise 7GPT1_1 - 

µVision2 Configurations (cont.) 

Add Files: 

Go to Project | Targets, Groups, Files… 

Click ‘Groups / Add Files’ 

Select ‘Source Group 1’ 

Click ‘Add Files to Group’ 

Select all C files and click ‘add’ 

Enter file name ‘start.asm’, click ‘add’ 

Click ‘Close’ and ‘OK’ 

Double-click all files in the Project Window to open them 


70


June 99 



Select Target Options: 

Go to Project | Options for Target ‘Target 1’ 

Select External Memory configuration 

- Go to ‘Target’ tab 

- If you are using C167CS: 

Uncheck the box “Allocate On-chip Code ROM” 

- External Memory #1: RAM: Start 0x4000, Size 0x3FFF 

- External Memory #2: ROM: Start 0x1000, Size 0x2FFF 

(those are example values and they need to be adapted 

e.g. for programming the code into the on-chip Flash memory) 

Select Linker Options: 

- Go to ‘L166 Misc’ 

- Interrupt Vector Table Address: Enter 0x0 

- Reserve: Enter 08H-0BH, 0ACH-0AFH 

(to reserve the Interrupt vector locations for NMI (Non- 

Maskable Interrupt) and Serial Interface Receive Interrupt) 


71


June 99 



Set Debug Options: 

- Go to ‘Debug’ tab 

- Click ‘Use Keil Monitor-166 Driver’ (upper right hand corner) 

- Click ‘Load Application at Startup’ and ‘Go till main()’ 

- Click ‘Settings’ (upper right hand corner) 

- Monitor configuration: select ‘Phytec KC167’ 

- Stop Program Execution with: select ‘Serial Interrupt or NMI’ 

- Click ‘OK’ 

Edit MAIN.C: 

include endless loop in main(): 

// USER CODE BEGIN (Main,2) 

while(1) {}; 

// USER CODE END 


72


June 99 

Exercise 7GPT1_1 - Running the Program 

Reset Target Hardware (Press Reset Button on Starter Kit) 

Connect Oscilloscope to P3.3 / T3OUT (connector X3 pin 106) 

Build Project: 

µVision2: Project | Rebuild Target 

Run integrated Debugger from within µVision2 

Debug | Start / Stop Debug Session (click ‘OK’ when prompted) 

The Debugger will load the Keil Monitor into the kitCON-167’s RAM 

via bootstrap loader 

Object file c:\hot167_1\7gpt1_1\7gpt1_1 will be loaded 

automatically and the debugger will go to main(). 

Watch the yellow arrow in the Disassembly Window or the C-files. 

Go! (Debug | Go) 

Watch oscilloscope signal 

If you hit Stop (Debug | Stop Running), the application stops in 

the endless loop in main(). 


73


June 99 


PMW Signal with T6 & CAPREL 


Frequency: 50 Hz 


Use core Timer 6 to count down, enable Timer 6 output toggle latch 

(T6OTL) 

Use Capture / Reload Register CAPREL to Reload Timer 6 on 

every underflow 


75


June 99 


PMW Signal with T6 & CAPREL 


Frequency: 50 Hz 


Use core Timer 6 to count down, enable Timer 6 output toggle latch 

(T6OTL) 

Use Capture / Reload Register CAPREL to Reload Timer 6 on 

every underflow 


77


June 99 


Start DAvE 





General: 


System Clock: 





and #WRH 

Save & close 



78


June 99 



Core Timer 6: 


- Up/Down Control: Count down 

- Timer Register: Load T6 with 10ms pulse value 

((20ms / 2) / 200ns) in HEX) (0xC350) 

- Timer Start: Start T6 after initialization 

- Reload Mode: Enable Reload from CAPREL 

- Alternate Output Function: Enable alternate output function 

(use T6OUT) 

Capture/Reload: 

- CAPREL Register: Set to 10ms pulse value (see above) 

Functions: 


Save & close 

Generate code 


79


June 99 


Start µVision2 

Open Project c:\hot167_1\7gpt2_1\7gpt2_1.uv2 (Project | Open Pr.) 

Add Files: 






Enter file name ‘start.asm’, click ‘add’ (Assembler Startup File) 



Select Target Hardware (kitCON-167): 


Go to ‘Debug’ tab 

Click ‘Settings’ (upper right hand corner) 

Monitor configuration: select ‘Phytec KC167’) 

Click ‘OK’ twice 


80


June 99 

Pulse Width Modulation Unit (PWM) 

(20 MHz) 

4 independent PWM channels each with its own time-base 

50ns or 12.8µs timer-resolution provides a very wide frequency 

range to generate PWM signals 

Programmable output polarity 

Up to 78 KHz at 8-bit PWM resolution 

F PWMmax = 

1 

2 8 x 50ns =78kHz 

Four operation modes 

Standard, edge-aligned PWM 

Symmetrical, center-aligned PWM for asynchronous motor control 

Burst-mode for modulated PWM signals 

Single-shot mode 


84


June 99 

PWM unit - Mode 0 and 1 

PWM Mode 0: 

Standard PWM’s or Edge-Aligned PWM’s 

Contents of the 

PWx Register 

PWM Signal 

Timer Period 

Interrupt Request and 

Latch of the Shadow Register 

If all channels are programmed to mode 0, 

edge-aligned PWM signals will be generated. 

A duty cycle from 0 to 100% is programmable 

PWMx 

PWMy 

Contents of the Period Register (PPx) 


PWM Mode 1: 

Symmetrical or Center-Aligned PWM’s 

PWM Signal 

Timer Period 

Contents of the PWx 

Register 

Timer Period 

If all channels are programmed to mode 1, 

center-aligned PWM signals will be generated. 

A duty cycle from 0 to 100% is programmable 

Possible PWM Signals from other channels programmed to the same mode: 

IR and Latch of the 

Shadow Register 

87


June 99 

Overview Port Structure 

The Port lines provide the connection to the external world 

111 Port lines on the C167 

All Port lines are individually addressable and all I/0 lines are 

independently programmable for input or output 

Each Port line is dedicated to one or more peripheral functions 

Each Port is protected with fast diodes 

Programmable open drain buffers 

P2, 3, 6, 7, 8 on the C167 


89


June 99 

Overview Port Structure 

Internal Bus 

Alternate 

Output 

Alternate 

Enable 

Read Direction 

Buffer 

Mux 

Mux 

Alternate Input 

Write 

Output 

Latch 


Direction 

Register 

Buffer 

Input 

Latch 

Clock 

Open Drain 

Control 

VCC 

Vss 

ESD structure 

Port 

Pin 

90


June 99 

Exercise 7PWM_1- DAvE Configurations 

Start DAvE 


Project name: 7pwm_1 

Select project path: c:\hot167_1\7pwm_1 


General: 


System Clock: 





and #WRH 

Save & close 



92


June 99 

Exercise 7PWM_1 - DAvE Configurations (cont.) 

Configure PWM (cont.) 

Functions: 

- Include PWM initialization function PWM_vInit 

Save & Close 

Configure Port 7: 

Port 7: 

- DAvE has reserved P7.1 and P7.3 for the PWM alternate 

functions with 0 as initial output 

Functions: 

- Include port initialization function IO_vInit 

Save & close 

Generate Code 


94


June 99 

Exercise 7PWM_1 - µVision2 Configurations 


Open Project c:\hot167_1\7pwm_1\7pwm_1.uv2 (Project | Open Pr.) 

Add Files: 













Monitor configuration: select ‘Phytec KC167’ 



95


June 99 

Exercise 7PWM_1 - Screenshot 

P7.1 / POUT1 

P7.3 / POUT3 

Period: 1ms 


DC 25% 

Edge 

Alignment 

DC 50% 

98


June 99 


Configure PWM: 

Control: 

- Configure Channel 1: 

- General: Use PWM Channel 1 

- PWM Channel Mode Control: Symmetrical PWM 

(center aligned) 

- Channel Output Enable: Enable Channel 1 output signal 

- PWM Timer Start Control: Start PWM Timer 1 after init 

- Period: Required Period: 250 us 

- Duty Cycle: Required Duty Cycle: 25% 

- Save & Close 



- PWM Channel Mode Control: Symmetrical PWM 

(center aligned) 




- Duty Cycle: Required Duty Cycle: 50% 



101


June 99 


Configure PWM (cont.) 

Functions: 


Save & Close 


Port 7: 

- DAvE has reserved P7.1 and P7.3 for the PWM alternate 


Functions: 


Save & close 

Generate Code 


102


June 99 

Exercise 7PWM_2 - µVision2 Configurations 


Open Project c:\hot167_1\7pwm_1\7pwm_1.uv2 (Project | Open Pr.) 

Add Files: 
















103


June 99 

Exercise 7PWM_2 - 


Edit MAIN.C: 



while(1) {}; 



104


June 99 

Exercise 7PWM_2 - Screenshot 

P7.1 / POUT1 

P7.3 / POUT3 

Period: 250us 

DC 25% 

Center 

Alignment 

DC 50% 


106


June 99 

CAPCOM 1 

Function Diagram 

P3.0 / T0IN 

P2.0 / CC0IO 

. 

. 

. 

. 

. 

. 

. 

. 

. 

P2.15 / CC15IO 

Clk max 

2.5 MHz 

from T6 

Clk max 

2.5 MHz 

from T6 

Edge Select 

for 

Capture Input 

Input 

Mode 

Control 

Input 

Mode 

Control 

Run 

Enable 

Run 

Enable 


T0 Reload 

Timer T0 

Sixteen 

16 Bit 

Capture/ 

Compare 

Register 

CC0-CC15 

Timer T1 

T1 Reload 

Mode Control 

- Capture Mode 

- Compare Mode 0 




- Double Register 

Compare Mode 0 

INTR 

Flag 

INTR 

Flag 

INTR 

Flag 

INTR 

Flag 

108


June 99 

CAPCOM 2 

Function Diagram 

P2.15 / T7IN 

P8.0/CC16IO- 

P8.7 / CC23IO 

P1H.4 / CC24IO - 

P1H.7 / CC27IO 

P7.4/CC28IO- 

P7.7 / CC31IO 

Clk max 

2.5 MHz 

from T6 

Channel 24 to 27 

only Capture 

Input possible 

Clk max 

2.5 MHz 

from T6 

Edge Select 

for 

Capture Input 

Input 

Mode 

Control 

Input 

Mode 

Control 

Run 

Enable 

Run 

Enable 


T7 Reload 

Timer T7 

Sixteen 

16 Bit 

Capture/ 

Compare 

Register 

CC16-CC33 

Timer T8 

T8 Reload 

Mode Control 

- Capture Mode 





- Double Register 

Compare Mode 0 

INTR 

Flag 

INTR 

Flag 

INTR 

Flag 

Channel 31 is able to trigger 

an ADC Channel Injection 

INTR 

Flag 

109


June 99 

CAPCOM 1/2 

Compare Mode 2 and 3 

Only one Compare events is possible within a single Timer period 

FFFF 

Mode 2: only 

INTR Flag is set 

Mode 3: INTR Flag is set. 

Port Pin is set at the first 

Compare Event and reset 

at Timer overflow 

Port Level 

P2.x / P8.x / P7.x 

Reload Value 

Compare Register X: Value 1 Value 2 

Compare INTR 

is changed to 


Compare Value 2 

Compare Value 1 

Timer INTR 

New 

Reload Value 

111


June 99 

Exercise 7CC1_1 - Two edge-aligned 

PWM Signals with the CAPCOM1 unit 

Objective: 

Generate an edge-aligned 25% duty cycle PWM Signal using 

CAPCOM channel 0 (Period: 26ms) allocated to Timer T0 


CAPCOM channel 8 (Period: 26ms) allocated to Timer T1 


113


June 99 

Exercise 7CC1_1 - DAvE Configurations 

Start DAvE 


Project name: 7cc1_1 

Select project path: c:\hot167_1\7cc1_1 


General: 


System Clock: 





and #WRH 

Save & close 



114


June 99 

Exercise 7CC1_1 - DAvE Configurations (cont.) 

Configure CAPCOM1: 

Timer 0/1: 

- Timer 0 Mode: Timer Mode 

- Timer 0 Input Selection: Fcpu / 8 (Resolution 400 ns) 

- Timer 0 Reload Register: 0x0000 (this will result in the 26 ms 

Period (65535 steps * 400ns = 26 ms)) 

- Timer 0 Start Control: Start Timer 0 after Initialization 






Channels: 


- Mode Selection: Enable Compare Mode 3 

- Allocation Bit: Allocate Channel 0 to Timer 0 

- Capture/Compare Register 0: Set to C000h (25% duty cycle) 

- Save & close 


115


June 99 



Port 2: 

- DAvE has reserved P2.0 and P2.8 for the CAPCOM alternate 


Functions: 


Save & close 

Generate Code 


117


June 99 

Exercise 7CC1_1 - µVision2 Configurations 


Open Project c:\hot167_1\7cc1_1\7cc1_1.uv2 (Project | Open Pr.) 

Add Files: 
















118


June 99 

Exercise 7CC1_1 - Running the Program 


Build Project (Project | Rebuild Target) 





Object file c:\hot167_1\7cc1_1\7cc1_1 will be loaded automatically 

and the debugger will go to main(). 


Program Verification: Connect Scope to 

P2.0 / CC0IO (connector X3 pin 85) 

P2.8 / CC8IO (connector X3 pin 93) 


120


June 99 


Start DAvE 





General: 


System Clock: 





and #WRH 

Save & close 



123


June 99 



Timer 0/1: 











Channels: 


- Mode Selection: Enable Compare Mode 1 (Double Register 

Compare Mode with CC11) 


- Capture/Compare Register 3: Set to 6000h 



124


June 99 


Configure CAPCOM1 (cont.) 

Channels (cont.) 



CompareModewithCC3) 


- Capture/Compare Register 11: Set to A000h 




Compare Mode with CC12) 


- Capture/Compare Register 4: Set to 4000h 




CompareModewithCC4) 


- Capture/Compare Register 12: Set to C000h 



125


June 99 

Exercise 7CC1_2 - 


Edit MAIN.C: 



while(1) {}; 



128


June 99 

Exercise 7CC2_1 - Signal Generation with 

CAPCOM1, Signal Detection with CAPCOM2 

Objective: 


CAPCOM1 channel 0 (Period: 26ms) allocated to Timer T0 

React on this signal with CAPCOM2 (Channel 16, P8.0 / CC16IO 

which shall be allocated to Timer 7). 

Let Capture Input channel 16 (CC16) generate an interrupt every 

time a rising edge is detected in the signal of Compare Output 

Channel 0 (CC0). (In addition to that, the value of Timer 7 is 

automatically captured into Capture/Compare Register 16.) 

In the ISR of CC16, toggle pin P8.1 

kitCON-167 Configurations: 

Connect pin P2.0 / CC0IO (connector X3 pin 85) 

with pin 8.0 / CC16IO (connector X3 pin 125): 

P2.0 / CC0IO 

Signal Output 

(X3 pin 85) 


P8.0 / CC16IO 

Signal Detection 

(X3 pin 125) 

131


June 99 


Start DAvE 





General: 


System Clock: 





and #WRH 

Save & close 



132


June 99 



Timer 0/1: 






Channels: 


- Mode Selection: Enable Compare Mode 3 


- Capture/Compare Register 0: Set to 8000h (50% duty cycle) 


Functions: 

- Include CAPCOM1 initialization function CC1_vInit 

Save & close 


133


June 99 



Timer 7/8: 






Channels: 


- Mode Selection: Capture on positive transition at pin CC16IO 


- Interrupt Control: Enable Capture Interrupt 


Interrupts: 

- Select an Interrupt Level for CAPCOM2 Channel 16 Interrupt 

Functions: 

- Include CAPCOM2 initialization function CC2_vInit 

Save & close 


134


June 99 

Exercise 7CC2_1 - µVision2 Configurations 


Open Project c:\hot164_1\4cc6_1\4cc6_1.uv2 (Project | Open Pr.) 

Add Files: 
















136


June 99 

Exercise 7CC2_1 - Running the Program 







Object file c:\hot167_1\7cc2_1\7cc2_1 will be loaded automatically 



Program Verification: 

Connect Scope to P2.0 / CC0IO (connector X3 pin 85) 

and P8.1 (connector X3 pin 129) 


138


June 99 

Exercise 7CC2_1 - 

Screenshot 

P2.0 / CC0IO 

P8.1 

Rising Edges in the signal 

ISR toggles P8.1 


139


June 99 

Analog Digital Converter 

(ADC) 

10-Bit ADC based on the successive approximation principle 

9.7µs conversion-time 

On-chip Sample & Hold circuit (1.6 us sample-time) 

16 Multiplexed input channels on C167CR, 24 on C167CS 

Automatic self-calibration after conversion 

Flexible operation mode 

Single-channel and single-channel-continuous for periodic data 

acquisition 

Auto-scan and auto-scan-continuous for permanent data tracking 

Channel-injection mode with own result-register can be used to 

interrupt the scan modes 

Easy error handling and channel identification 

10-bit result and channel number in result register 

Overrun error check 


140


June 99 

10-Bit A/D Converter 

Block Diagram 

P5.0**/AN0 

. 

. 

. 

. 

P5.15**/AN15 

Analog 

Inputs 

Reference 

Voltage 

Channel and Mode Control Conversion Control 

16* 

Channel 

Analog 

MUX 

C-NET 

Comparator 

Switch 

Tree 

Channel 

Information 

Channel 

Selection 


Timing 

Control 

and 

Successive 

Approximation 

Register 

Result Register 

INTR 

Flag 

INTR 

Flag 

Result Register for Channel Injection Mode 

* C167CS has 24 ADC channels 

** the analog signal inputs of the C167CS are fetched from port P1L.0 - P1L.7 

141


June 99 

Exercise 7ADC_1 - Control the Pulse Width of a 

PWM signal with a PEC-transferred ADC Value 

Objective: 

Control the Pulse Width of PWM channel 2 from 0% to 100% with 

PEC-transferred ADC Value from ADC Channel 0. 

(external potentiometer necessary. Hint: won’t run like this with any 

other A/D channel except channel 0 because of the channel 

number integrated in the A/D conversion result) 


Connect a potentiometer to analog input channel 1 (>= 10kOhm) 

and connect ADC input pins 0 and 1 (with jumper or cable): 

GND 

(e.g. X3 pin 3 

or X3 pin 4) 

A/D input 

channel 1 

P5.1 / AN1 

(X3 pin 73) 


A/D input 

channel 0 

P5.0 / AN0 

(X3 pin 69) 

Vcc 


or X3 pin 2) 

142


June 99 

Exercise 7ADC_1 - DAvE Configurations (cont.) 

Configure ADC: 

Control: 

- Mode Selection: Fixed channel continuous conversion 

- Analog Channel Input Selection: Analog Channel 0 

- Start Bit: Start Conversion after Initialization 

- Interrupt Control: Enable end-of-conversion Interrupt 

Interrupts: 

- Allocate ADC Conversion Interrupt to IR Level 14, Group Level 

3 (PEC channel 3) 

PEC: Click to configure channel 3 for ADC Conversion 

- Transfer Count: Continuous Transfer 

- Increment Control: Pointers are not modified 

- Byte / Word Transfer: Transfer a Word 

- Pointers: 

- Select ADC Result Register ADDAT as Source Pointer 

- Select PWM Pulse Width Register 2 (PW2) as Destination 

Pointer 



144


June 99 


Configure ADC (cont) 

Functions: 

- Include ADC initialization function ADC_vInit 

Save & close 


Control: 



- PWM Channel Mode Control: Standard PWM (edge aligned) 




- Duty Cycle: Required Duty Cycle: 0% (just as an initial value) 


Functions: 


Save & Close 

Generate Code 


145


June 99 

Exercise 7ADC_1 - µVision2 Configuration 


Open Project c:\hot167_1\7adc_1\7adc_1.uv2 (Project | Open Pr.) 

Add Files: 
















146


June 99 

Exercise 7ADC_1 - Running the Program 







Object file c:\hot167_1\7adc_1\7adc_1 will be loaded automatically 




Connect Scope to P7.2 / POUT2 (Connector X3 pin 118) 

(no screenshot is included for this exercise) 


148


June 99 



Control: 





Interrupts: 

- Allocate ADC Conversion Interrupt to IR Level 14, Group Level 

3 (but we don’t want PEC service this time) 

(PEC: Click to configure channel 3 for ADC Conversion 

- Transfer Count: NORMAL INTERRUPT (default) 

- Save & close or cancel) 

Functions: 

- Include ADC initialization functions ADC_vInit and 

ADC_uwReadConv 

Save & close 


151


June 99 



Control: 



- PWM Channel Mode Control: Standard PWM (edge aligned) 



- Period: Required Period: 3000 us (just as an initial value) 

- Duty Cycle: Required Duty Cycle: 50% (just as an initial value) 


Functions: 


- Include PWM_vSetPeriod(Channel,Value) 

- Include PWM_vSetPw(Channel,Value) 

Save & Close 

Generate Code 


152


June 99 

Exercise 7ADC_2 - µVision2 Configurations 


Open Project c:\hot167_1\7adc_2\7adc_2.uv2 (Project | Open Pr.) 

Add Files: 
















153


June 99 

Exercise 7ADC_2 - 


void ADC_viIsrConv(void) interrupt ADCINT 

{ 

// USER CODE BEGIN (ADC_IsrConv,1) 

unsigned int adc_result; 

adc_result=ADC_uwReadConv(); 

// get ADC conversion value 

adc_result=adc_result & 0x3ff; 

// … and get rid of channel number 

PWM_vSetPeriod(PWM_REG0,adc_result); 

// load Period Register 0 with adc conversion 

PWM_vSetPw(PWM_REG0,adc_result/2); 

// load Pulse Width register 0 with adc/2 


} 


155


June 99 

Exercise 7SSC_1 - Synchronous Serial Transm. 

of ADC Conversion Results (10 bits) at 5 Mbit/s 

Objective: 

Use the Synchronous Serial Channel to transmit the 10 bits of the 

ADC conversion result of ADC channel 1 at 5 Mbit/s, LSB first, Idle 

Clock low, every time a new ADC conversion result is available. 

Use a PEC Transfer to move ADC Conversion Value of channel 1 

to the SSC Transmit Buffer on every ADC Interrupt Event. 

Use the ADC Interrupt Service Routine to reload the PEC counter 

at every 5th conversion 

(to demonstrate how to do a certain number of PEC transfers and 

then react on the following Interrupt Service Routine) 

Hint: external potentiometer necessary. See next page. 


159


June 99 

Exercise 7SSC_1 (cont.) 


Connect a potentiometer to analog input channel 1: 

(>= 10kOhm) : 

GND 


or X3 pin 4) 

A/D input channel 1 

P5.1 / AN1 

(X3 pin 73) 


Vcc 


or X3 pin 2) 

160


June 99 

Exercise 7SSC_1 - DAvE Configurations 

Start DAvE 


Project name: 7ssc_1 

Select project path: c:\hot167_1\7ssc_1 


General: 


System Clock: 





and #WRH 

Save & close 



161


June 99 

Exercise 7SSC_1 - DAvE Configurations (cont.) 

Configure SSC: 

Control: 

- Enable Bit: Enable transmission and reception 

- Master Select: Master Mode 

- Data Control: 

- Data Width 10 bits 

- Transmit LSB first 

- Clock Phase Control: Shift Transmit data on leading clock 

edge, latch on trailing edge (not important for this example) 

- Clock Polarity Control: Idle Clock line is low 

Baudrate: 

- Required Baudrate: 5000 kBaud 

Functions: 

- Include SSC initialization function SSC_vInit 

Save & close 


162


June 99 

Exercise 7SSC_1 - DAvE Configurations (cont.) 

Configure ADC (cont) 

Functions: 

- Include ADC initialization function ADC_vInit 

Save & close 

Generate Code 


164


June 99 

Exercise 7SSC_1 - Running the Program 







Object file c:\hot167_1\7ssc_1\7ssc_1 will be loaded automatically 




Connect Scope to P3.13 / SCLK (connector X3 pin 115) 

and P3.9 / MTSR (connector X3 pin 113) 


167


June 99 

Exercise 7SSC_1 - Screenshot 

P3.13 / SCLK 

P3.9 / MTSR 

10 Clock pulses from the SSC 

for10bitstobetransmitted: 

Speed: 5 Mbaud 

LSB MSB 

ADC Result 


168


June 99 

Asynchronous / Synchronous Serial Channel 

(USART) (20MHz) 

Synchronous / asynchronous serial channel with its own baudrate-generator 

Asynchronous mode with max 625 KBaud transfer rate 

Full duplex (receive and transmit at the same time) 

programmable features: 

1 or 2 stop bits, 7, 8 or 9 data bits 

Generation of parity- or wake-up bit at data transmission 

Odd or even parity 

Error detection (parity, overrun, framing) 

Wake-up check (receive int. flag is set if wake-up bit is true) 

Synchronous mode with max 2.5 Mbit/sec transfer range 

Half duplex operation (only transmit or receive possible) 

Easy I/O expansion with external shift register 

Overrun error detection 


169


June 99 

Exercise 7ASC_1 - Asynchronous Serial 

Transmission of Ascii-Characters 

Objective: 

Use the Asynchronous Serial Channel to transmit consecutive Ascii 

characters to the PC 

Use Timer 3 interrupt service routine to write the next character to 

the ASC Transmit Buffer on every Timer 3 underflow 

Timer 3 shall underflow every 10ms (use Timer 4 for reload) 


171


June 99 

Exercise 7ASC_1 - DAvE Configurations (cont.) 


Core Timer 3: 




- Input Selection: Fcpu/16 (this results in a resolution of 0.8us 

and a period of 52.4ms) 

- Timer Register: Load T3 Register with 10ms value 

((10ms / 0.8us) in HEX) (0x30d4) 

- Interrupt Control: Enable Timer 3 interrupt 



- Timer Register: Load T4 Register with 10ms value 

((10ms / 0.8us) in HEX) (0x30d4) 

- Input Selection: Any transition of output toggle latch T3OTL 


173


June 99 

Exercise 7ASC_1 - µVision2 Configurations 


Open Project c:\hot167_1\7asc_1\7asc_1.uv2 (Project | Open Pr.) 

Add Files: 
















175


June 99 

Exercise 7ASC_1 - 


Edit MAIN.C: 



while(1) {}; 


Edit GT1.C: 

Define Global Variable ascii_char: 

// USER CODE BEGIN (GT1_General,2) 

unsigned char ascii_char; 


In Timer 3 Interrupt Service Routine (GT1_viIsrTmr3(void)): 

Write ascii_char to ASC and increment ascii_char: 

// USER CODE BEGIN (GT1_IsrTmr3,1) 

ASC_vSendData(ascii_char++); 



176


June 99 

Infineon, The CAN 

Reference! 


179


June 99 

User Benefits 

CAN is low cost 

Serial bus with two wires: good price/performance ratio 

Low cost protocol devices available driven by high volume 

production in the automotive and industrial markets 

About 15.000.000 CAN nodes in use so far 

CAN is reliable 

Sophisticated error detection and error handling mechanisms 

results in high reliability transmission 

Example: 500 kbit/s, 25% bus load, 2000 hours per year: 

One undetected error every 1000 years 

Erroneous messages are detected and repeated 

Every bus node is informed about an error 

High immunity to Electromagnetic Interference 


180


June 99 

Higher Layer Protocols (cont.) 

CANopen (CiA DS-301) 

Application profile based on CAL 

While CAL determines the way of communicating, an Application 

Profile determines the meaning of specific messages for the 

respective application 

Target: device interchangeability for certain applications 

Further higher level protocols / standards: 

Automotive Sector: VOLCANO, OSEK (in development) 

Industrial Automation: DeviceNet (ODVA), 

SDS (Honeywell) 


184


June 99 

Application Examples (cont.) 

CAN in trains 

High need of data exchange between the different electronic 

subsystem control units 

Mainly data about acceleration, braking, door control, error 

messages etc. but also for diagnosis 

CAN in industrial automation 

Excellent way of connecting all kinds of automation equipment 

(control units, sensors and actuators) 

Used for initialization, program and parameter up-/download, 

exchange of rated values / actual values, diagnosis etc. 

Machine control (printing machines, paper- and textile machines 

etc.): Connection of the different intelligent subsystems 

Transport systems 


186


June 99 

Some things worth knowing about CAN 

Developed in the mid-eighties by BOSCH 

Asynchronous serial bus with linear bus structure and equal 

nodes (Multi Master bus) 

CAN does not address nodes (address information is inside the 

messages combined with message priority) 

Two bus states: dominant and recessive 

Bus logic according to "Wired-AND" mechanism: 

dominant bits (Zeros) override recessive bits (Ones) 

Bus Access via CSMA/CD with NDA (Carrier Sense Multiple 

Access/ Collision Detection with Non-Destructive Arbitration) 


188


June 99 

Some things worth knowing about CAN (cont.) 

NODE A 

NODE B 

bus idle 

CAN BUS 

Node B sends out recessive 

but reads back dominant level 


recessive 

dominant 

recessive 

dominant 

recessive 

dominant 

Node B loses arbitration 

and switches to receive 

189


June 99 

Typical CAN node structure 

Application 

Host-Controller 

CAN-Controller 

CAN- 

Transceiver 

CAN-Bus 

CAN_H 

CAN_L 

Node A Node B 

e.g. 

ABS 

e.g. 

80C166 

e.g. 

SAE81C90 


e.g. 

EMS 

e.g. 

C167CR 

or 

C515C 

CAN 

(more nodes) 

U Diff 

190


June 99 

CAN Data Frames 

There are mainly two ways of communicating: 

One node is 'talking', all other nodes 'listen' 

Node A is asking Node B for something and gets the answer. 

To 'talk', CAN nodes use Data Frames. 

A Data Frame consists of an Identifier, the data to be 

transmittedand a CRC-Checksum. 

Identifier Data Field (0..8 Bytes) 

CRC-Field 


191


June 99 

CAN Data Frames (cont.) 

The identifier specifies the contents of the message 

('engine speed', 'oil temperature', etc.) and the message priority 

The Data Field contains the corresponding value 

('6000 rpm', '110°C', etc.) 

The Cyclic Redundancy Check is used to detect transmission 

errors. 

All nodes receive the Data Frame. Those who do not need the 

information, just don't store it. 


192


June 99 

CAN Remote Frame Scenario 

Node A 

How hot is the oil ? 

Remote Frame; Identifier 'oil_tmp' 

115 °C ! 

Data Frame; Identifier 'oil_tmp'; 

contains desired information 


Node B 

(oil temp.sensor) 

~~~~~ 

~~~~~ 

115°C 

194


June 99 

Standard CAN / Extended CAN 

Most CAN nodes talk in the 'language' that most other CAN nodes 

understand: They use Standard Data or Remote Frames. 

A Standard Frame contains an identifier which is 11 bits long. 

With this 11 bits, 211 (=2048) different messages can be 

addressed. 

CAN nodes using Standard-CAN-Frames use the CAN 

Specification Version 2.0A. 

Some CAN nodes talk with a special 'accent': 

They use Extended Data or Remote Frames. 

An Extended Frame contains an identifier which is 29 bits long. 


195


June 99 

Standard CAN / Extended CAN (cont.) 

Over 536 million (229) different messages can be addressed. 

CAN nodes using Extended-CAN-Frames use the CAN 

Specification Version 2.0B (active). 

Some Standard-CAN nodes don't understand this 'accent', but 

they tolerate it and just don't care. 

If an Extended Frame is 'on the air', these CAN nodes cannot store 

the data, but they as well do not produce errors. 

These CAN nodes use CAN Version 2.0A, but are also known as 

Version 2.0B passive. 

They can be used in a Controller Area Network where Extended 

Frames are used. 


196


June 99 

Standard CAN / Extended CAN (cont.) 

Some Standard-CAN nodes don't understand and also don't 

tolerate this 'accent'. 

If an Extended Frame is 'on the air', these CAN nodes produce 

errors. 

These CAN nodes use only CAN Version 2.0A. 

They can not be used in a Controller Area Network where Extended 

Frames are used. 

Infineon 16 bit parts: C161xx, C167CR/CS, C164CI: V2.0B active 


197


June 99 

Basic CAN / Full CAN 

In some CAN controllers, only the basic CAN functions are 

implemented. They are called Basic-CAN controllers. 

Mostly there's only one transmit buffer and one or two receive 

buffers for transmission and reception of the Data- / Remote 

Frames. 

Each incoming message is stored. The host CPU has to decide 

whether the message data is needed or not. 

Therefore these controllers should only be used in CANs with very 

low baudrates and/or very few messages because of the high CPU 

load. Advantage: They use the least possible silicon area. 

CAN Bus 

Receive Buffer 

Transmit Buffer 

Basic-CAN Controller 


Host CPU 

low high 

CPU load 

Messages 

to be sent 

Received 

Messages 

198


June 99 

Basic CAN / Full CAN (cont.) 

In the other CAN controllers, also message management and 

acceptance filtering are implemented. They are called Full-CAN 

controllers. 

There are several Message Objects, each with its own identifier. 

Only if a message for one of these preprogrammed identifier is 

received, it is stored and the CPU is interrupted. 

In this way, the CPU load is low. 

CAN Bus 

Acceptance 

Filtering 

Message Object 1 

Message Object 2 

. 

. 

Message Object n CPU load 

Full-CAN Controller 


Message 

Management 

All Infineon CAN-Controllers are Full-CAN controllers. 

But they also provide Basic-CAN functionality. 

 

low high 

Host CPU 

199


June 99 

Features of the CAN Module 

on the C167CR/CS 

Functionality corresponds to AN 82527 

Complies with CAN spec V2.0B active 

(Standard- und Extended-CAN) 

Maximum CAN Transfer Rate 

(1 MBit/s) 

Full CAN Device 

15 Message Objects with their own 

identifier and their own status and 

control bits 

Each Message Object can be defined 

as Transmit or Receive Object 


200


June 99 

Features of the CAN Module on the C167CR/CS 

(cont.) 

Programmable Mask Registers for Acceptance Filtering 

Global Mask for incoming Messages (Full-CAN-Objects) 

Additional Mask for Message Object 15 

(Basic-CAN-Feature) 

Basic CAN Feature (Message Object 15) 

Equipped with two Receive Buffers 

Own Global Mask Register for Acceptance Filtering 

Connection to the Host CPU (C166-Core) 

Module access via chip-internal XBUS 

(16-bit demultiplexed mode) 

Interrupt connection to the CPU; Flexible interrupt event control 

To connect the application to CAN only a CAN transceiver is 

needed 


201


June 99 

Connecting the C167CR/CS to CAN 

Connection 

to the 

Application 

Pa.b 

Pc.d 

C164CI 

P4.5 

CAN_RxD 

P4.6 

CAN_TxD 

E.g. P8.0 

R(opt) 


CAN-Bus 

Transceiver 

Receive 

CAN_H 

Transmit 

CAN_L 

(Standby) 

Vref 

n.c. 

CAN_L 

CAN_H 

202


June 99 

Exercise 7CAN_1 - Transmitting a Standard CAN 

Message with the CAN Module 

Objective: 

Generate one Standard CAN (11-bit-Identifier) Message with the 

on-chip CAN Module* 

Evaluate every identifier bit of incoming messages* 

Use maximum bus speed of 1 Mbaud 

Use Message Object 1 

Use Identifier 0x123 

Use 8 Data Bytes containing the data 0x00, 0x11, …, 0x77. 

*Hints: 

As long as no receiving node is connected to the kitCON-167, the 

C167CR will not receive an acknowledge for its transmission and 

therefore will keep on trying to transmit the CAN message “forever”. 

Connect another Starter Kit with CAN Capability or a CAN Analyzer 

to the CAN bus to generate real CAN data transfers. 


203


June 99 

Exercise 7CAN_2 - DAvE Configurations 

Start DAvE 

Create new Project with microcontroller C167CS* 

Project name: 7can_2 

Select project path: c:\hot167_2\7can_2 


General: 


System Clock: 





and #WRH 

Save & close 



211


June 99 

Exercise 7CAN_2 - DAvE Configurations (cont.) 

Configure CAN Modules: 

Because DAvE does not yet support the C167CS with the on-chip 

CAN Module 2, the files CAN1.C, CAN2.C, CAN1.H, CAN2.H are 

included in the directory c:\hot167_1\7can_2 

The files contain the same code as it would be generated by DAvE 


Port 2: 

- Enable P2.0 / CC0IO as general IO / Out 

Functions: 

- Include Port Initialization Function IO_vInit 

Save & Close 




- Input Selection: Any transition of T3OTL 

- T2Register:Setto0x4C4B 


212


June 99 


Core Timer 3 



1000ms period of T3) 

- T3Register:Setto0x4C4B 

- Input Selection/Prescaler: Fcpu/512 

- Alternate Output Function: enable alternate output function (use 

T3OUT) 

- Interrupt Control: Enable T3 interrupt 

Functions: 


Interrupts: 

- Place interrupt of T3 in level 14, group 1 of the Interrupt Vector 

Table 

Save & close 


213


June 99 


Configure External Bus Controller: 

BUSCON 0 (Flash): 

- Memory Cycles Time Control: 1 waitstate 

- Memory Tristate Control: No Waitstate 

- ALE Lengthening Control: Normal ALE Signal 

BUSCON 1 (RAM): 

- Enable external bus 

- Bus Configuration (BTYP): 16 bit DMUX 



- Address Area (ADDRSEL 4): 

- Set Windows Size to 64 Kbyte 

- Set Required start address (A23..A12) to 0x040 

Generate code 


214


June 99 

Exercise 7CAN_2 - µVision2 Configurations 


Create new Project: ‘7can_2.uv2’ 


Browse to directory c:\hot167_1\7can_2\ 

Enter file name: 7can_2.uv2 




Select ‘C167CS-32FM’ 



215


June 99 

Exercise 7CAN_2 - 


Add Files: 










216


June 99 



Select Target Options: 


Select External Memory configuration 

- Go to ‘Target’ tab 

- Uncheck the box “Allocate On-chip Code ROM” 

- External Memory #1: RAM: Start 0x40000, Size0x0FFFF 

- External Memory #2: ROM: Start 0x00000, Size0x3FFFF 

Select Linker Options: 

- Go to ‘L166 Misc’ 

- Interrupt Vector Table Address: Enter 0x0 

Set Output Options: 

- Go to ‘Output’ tab 

- Click ‘Create HEX-File’ 

- Click ‘OK’ 


217


June 99 



Edit MAIN.C (Project_Init()-function, Main()-function): 

Edit Project_Init()-function: 

- Insert: CAN1_vInit(); 

CAN2_vInit(); 

Edit Main()-function: 


while(1); 


Edit MAIN.H 

Include: 

#include “CAN1.H” 

#include “CAN2.H” 


218


June 99 



Edit Start.asm*: 

Edit Start.asm (Special Function Register Addresses): 

XPERCON DEFR 0F024H 

Edit Start.asm (in C_STARTUP, after watchdog timer instruction): 

... 

DISWDT 

$ENDIF 

EXTR #1 

; Disable watchdog timer 

MOV XPERCON,#0403H 



This will generate the HEX-file 

* Because of the new XPERCON register both CAN modules have to be selected, before the 

selected XBUS peripherals are globally enabled (by bit XPEN within SYSCON). 


220


June 99 

Exercise 7GPT2_2 - Frequency Multiplication 

of a 50% duty cycle PWM signal with GPT2 

Objective: 

Generate a 50% duty cycle PWM signal with PWM channel 0 

Control the Frequency of the signal at PWM channel 0 with an ADC 

Value from ADC Channel 1 using the ADC Interrupt Service 

Routine to reload the PWM registers (external potentiometer 

necessary) 

Multiply this frequency by 8 with GPT2 


Connect a potentiometer to analog input channel 1 (>= 10kOhm) 

and connect PWM channel 0 output to GPT2 Capture Input: 

GND 


or X3 pin 4) 

P7.0 / POUT0 

Signal Output 

(X3 pin 117) 

A/D input channel 1 (P5.1 / AN1) (X3 pin 73) 


Vcc 


or X3 pin 2) 

P3.2 / CAPIN 

Signal Detection 

(X3 pin 102) 

223


June 99 


Start DAvE 





General: 


System Clock: 





and #WRH 

Save & close 



224


June 99 



Control: 





Interrupts: 

- Select an Interrupt Level for ADC Conversion Interrupt 

Functions: 

- Include ADC initialization functions ADC_vInit and 


Save & close 


225


June 99 



Core Timer 5: 


- Up/Down Control: Count up 

- Input Selection: Fcpu / 32 (Resolution 1.600 us) 


Core Timer 6: 



- Input Selection: Fcpu / 4 (Resolution 0.200 us) 


- Reload Mode: Enable Reload from CAPREL 

- Alternate Output Function: Enable alternate output function 

(use T6OUT) 


227


June 99 


Configure GPT2 (cont.) 

Capture/Reload: 

- Capture Enable: Enable Capture of T5 into CAPREL 

- CAPREL Input Selection: any transition on capture input pin 

CAPIN 

- Timer 5 Clear Bit: T5 cleared on capture event 

Functions: 


Save & close 


Port 7: 

- Configure pin P7.0 for General Purpose I/O with Push/Pull 

Output and 0 as initial output 

Functions: 


Save & close 

Generate code 


228


June 99 



Open Project c:\hot167_1\7gpt2_2\7gpt2_2.uv2 (Project | Open Pr.) 

Add Files: 
















229


June 99 



Edit MAIN.C: 



while(1) {}; 


Edit ADC Interrupt Service Routine in ADC.C (also s. next page) 

Get ADC Conversion Value and shift it left by four to make it a 16bit 

value. Use function ADC_uwReadConv(). 

Load Period Register of PWM channel 0 with this value. 

Use function PWM_vSetPeriod(Channel,Value). 

(channel=PWM_REG0) 

Load Pulse Width Register of PWM channel 0 with half of the 

Period Register to achieve 50% duty cycle. 

Use function PWM_vSetPw(Channel,Value). 

(channel=PWM_REG0) 


230


June 99 



void ADC_viIsrConv(void) interrupt ADCINT 

{ 

// USER CODE BEGIN (ADC_IsrConv,1) 

unsigned int adc_result; 

adc_result=ADC_uwReadConv(); 

// get ADC conversion value 

adc_result=adc_result


June 99 

Exercise 7GPT2_2 - Running the Program 







Object file c:\hot167_1\7gpt2_2\7gpt2_2 will be loaded 

automatically and the debugger will go to main(). 



Connect Scope to P7.0 / POUT0 (connector X3 pin 117) 

Connect Scope to P3.1 / T6OUT (connector X3 pin 105) 


232


June 99 


Screenshot 

P7.0 / POUT0 

P3.1 / T6OUT 

Signal generated by PWM Channel 0 

Signal generated by GPT2 from the above signal 


x8 

233


June 99 

Exercise DAAD: 

D/A A/D Conversion using the serial interface 

ASC0, the PWM unit, the ADC and the GPT1 

Byte sent from PC 01001101 

Receive Buffer S0RBUF 

Async. Serial Interface 

PEC 

Puls Width Register PW0 

PWM channel 0 

5V R 

t 

PC 

µC 


Timer 2 Overflow 

C 

Byte sent to PC 11010110 

Transmit Buffer S0TBUF 

Async. Serial Interface 

A/D-Converter channel 0 

Result Register ADDAT 

3V 

234 

t


June 99 

Exercise DAAD - Description 

Objective: 

The microcontroller shall communicate with the PC via the serial 

interfaceinbothdirections. 

The Visual Basic program DAAD allows to send a byte between 

00h and FFh to the microcontroller, representing a voltage between 

0and5volts. 

This byte is received by the microcontroller via the serial interface. 

On every reception, a PEC Transfer moves the received byte into 

the pulse-width register of PWM Channel 0, which generates a 

PWM signal with 0% to 100% duty cycle according to the received 

value. 

The PWM Channel 0 output is connected to an integrator (only a 

resistor & capacitor) which is connected to the A/D-Converter input 

(channel 0). The average of the PWM-signal is measured. 

The Flash Tools are used to burn the program into the on-board 

FLASH. 


235


June 99 

Exercise DAAD - Description (cont.) 

Objective (cont.) 

On every timer 2 overflow the corresponding interrupt service 

routine writes the A/D-result (only the highest 8 bit of 10) to the 

S0TBUF register to transmit the byte to the PC. 

(Note: You could also use the A/D Converter end-of-conversion 

Interrupt to trigger the transmission of a new byte. Timer 2 was 

chosen to include another peripheral into the exercise). 

The byte received by the PC is evaluated and the corresponding 

voltage that has been measured by the A/D-Converter is shown in 

the voltmeter window. 


Connect PWM Channel 0 output to analog input channel 0 via a 

47kOhm resistor and a 10uF capacitor : 

PWM output 

channel 0: 

P7.0 / POUT0 

47kΩ 


10µF 

A/D input 

channel 0: 

P5.0 

236


June 99 

Exercise DAAD - DAvE Configurations 

Start DAvE 


Project name: DAAD 

Select project path: c:\hot167_1\daad 


General: 


System Clock: 





and #WRH 

Save & close 



237


June 99 

Exercise DAAD - DAvE Configurations (cont.) 

Configure ASC USART: 

Control: 

- Global: Use pin TxD0 for ASC 

- Receiver: Enable Receiver (S0REN) 

- Interrupts: Enable the receive interrupt (S0RIE) 

Interrupts: 

- Pick highest level for ASC Receive interrupt 

PEC: Click to configure channel 7 for ASC Receive Interrupt 

- Transfer Count: Continuous Transfer 

- Increment Control: Pointers are not modified 

- Byte / Word Transfer: Transfer a Word 

- Pointers: 

- Select ASC0 Receive Buffer Register as Source Pointer 

- Select PWM Pulse Width Register 0 as Destination Pointer 


Functions: 

- Include select ASC_vInit, ASC_vSendData 

Save & close 


238


June 99 



Control: 




Functions: 

- Include ADC initialization function ADC_vInit and 


Save & close 


240


June 99 






26.2ms period of T2) 

- Interrupt Control: Enable Timer 2 Interrupt 

Interrupts: 

- Select a level for Timer 2 Interrupt 

Functions: 


Save & close 


241


June 99 


Configure External Bus Controller: 

BUSCON 0 (Flash): 



- ALE Lengthening Control: Normal ALE Signal 

BUSCON 1 (RAM): 

- Enable external bus 

- Bus Configuration (BTYP): 16 bit DMUX 



- Address Area (ADDRSEL 4): 

- Set Windows Size to 64 Kbyte 

- Set Required start address (A23..A12) to 0x040 

Generate Code 


242


June 99 

Exercise DAAD - µVision2 Configurations 


Create new Project: ‘daad.uv2’ 


Browse to directory c:\hot167_1\daad\ 

Enter file name: daad.uv2 




Select ‘C167CR-LM’ or ‘C167CS-32FM’ 



243


June 99 

Exercise DAAD - 


Add Files: 










244


June 99 



Edit MAIN.C: 



while(1) {}; 



246


June 99 



Edit GT1.C: 

void GT1_viIsrTmr2(void) interrupt T2INT 

{ 

// USER CODE BEGIN (GT1_IsrTmr2,1) 

int AD_value; 

//read a 8 bit result: 

AD_value = (ADC_uwReadConv() & 0x03FC) >>2; 

// and send it to the PC: 

ASC_vSendData(AD_value); 


} 



This will generate the HEX-file 


247


June 99 

Exercise DAAD - Using the Flash Tools 

Step by Step to use the Flashtool: 

connect your evaluation board to a power supply and the PC 

Put blue DIP switch #1 to the ON position 

- Older Starter kits: close pins 1+2 of jumper 2 (usually red) 

press reset button S1 on kitCON-167 

run flasht.exe in ..\cdrom\startkit\sk_167\flash\ 

Press (2) to erase entire Flash-Area and (Y) for yes 

Press (4) - Load INTEL-Hexfile to download the Hex-code to the 

evaluation board 

Press F2 and enter the complete path of the hex-file (.h86): 

c:\hot167_1\daad\daad.h86 

Press F1 and (Y) to exit Flashtool 


248


June 99 

Exercise DAAD - Screenshot 1 


250


June 99 

Exercise DAAD - Screenshot 2 

P7.0 / POUT0 

5V 

P5.0 / AN0 0V 


251

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