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The <strong>Evolution</strong> of <strong>Microprogramming</strong><br />

In this lecture, we deviate somewhat from the textbook<br />

<strong>and</strong> discuss the history of microprogrammed control units.<br />

The main topics for this lecture are as follows:<br />

1. A review of the function of the Control Unit as a part of<br />

the CPU <strong>and</strong> the st<strong>and</strong>ard ways to implement control.<br />

2. A quick introduction to VHDL, a language that can be<br />

used to design <strong>and</strong> test a hardwired control unit.<br />

3. The origin of the microprogrammed control unit, <strong>and</strong><br />

factors that affected its early development.<br />

We begin with a review of the CPU (Central Processing Unit) of a typical <strong>com</strong>puter,<br />

<strong>and</strong> <strong>com</strong>ment on function of the control unit.


The Central Processing Unit (CPU)<br />

The CPU has four main <strong>com</strong>ponents:<br />

1. The Control Unit (along with the IR) interprets the machine language instruction<br />

<strong>and</strong> issues the control signals to make the CPU execute that instruction.<br />

2. The ALU (Arithmetic Logic Unit) that does the arithmetic <strong>and</strong> logic.<br />

3. The Register Set (Register File) that stores temporary results related to the<br />

<strong>com</strong>putations. There are also Special Purpose Registers used by the Control Unit.<br />

4. An internal bus structure for <strong>com</strong>munication.<br />

The function of the control unit is to decode the binary machine word in the IR<br />

(Instruction Register) <strong>and</strong> issue appropriate control signals, mostly to the CPU. It is the<br />

control signals that cause the <strong>com</strong>puter to execute its program.


Design of the Control Unit<br />

There are two related issues when considering the design of the control unit:<br />

1) the <strong>com</strong>plexity of the Instruction Set Architecture, <strong>and</strong><br />

2) the microarchitecture used to implement the control unit.<br />

In order to make decisions on the <strong>com</strong>plexity, we must place the role of the control unit<br />

within the context of what is called the DSI (Dynamic Static Interface).<br />

The ISA (Instruction Set Architecture) of a <strong>com</strong>puter is the set of assembly language<br />

<strong>com</strong>m<strong>and</strong>s that the <strong>com</strong>puter can execute. It can be seen as the interface between the<br />

software (expressed as assembly language) <strong>and</strong> the hardware.<br />

A more <strong>com</strong>plex ISA requires a more <strong>com</strong>plex control unit.<br />

At some point in the development of <strong>com</strong>puters, the <strong>com</strong>plexity of the control unit<br />

became a problem for the designers. In order to simplify the design, the developers of the<br />

control unit for the IBM–360 elected to make it a microprogrammed unit.<br />

We shall spend some time investigating the motivations of the IBM design team.


The Dynamic–Static Interface<br />

In order to underst<strong>and</strong> the DSI, we must place it within the context of a <strong>com</strong>piler for a<br />

higher–level language. Although most <strong>com</strong>pilers do not emit assembly language, we<br />

shall find it easier to under the DSI if we pretend that they do.<br />

What does the <strong>com</strong>piler output? There are two options:<br />

1. A very simple assembly language. This requires a sophisticated <strong>com</strong>piler.<br />

2. A more <strong>com</strong>plex assembly language. This may allow a simpler <strong>com</strong>piler,<br />

but it requires a more <strong>com</strong>plex control unit. If <strong>com</strong>plex enough, parts of the<br />

control unit are probably microprogrammed.


How Does the Control Unit Work?<br />

The binary form of the instruction is now in the IR (Instruction Register).<br />

The control unit decodes that instruction <strong>and</strong> generates the control signals necessary for<br />

the CPU to act as directed by the machine language instruction.<br />

The two major design categories here are hard–wired <strong>and</strong> microprogrammed.<br />

Hardwired:<br />

The control signals are generated as an output of a<br />

set of basic logic gates, the input of which derives<br />

from the binary bits in the Instruction Register.<br />

Microprogrammed:<br />

The control signals are generated by a microprogram<br />

that is stored in Control Read Only Memory.<br />

The microcontroller fetches a control word from the<br />

CROM <strong>and</strong> places it into the MBR, from which<br />

control signals are emitted.<br />

The microcontroller can almost be seen as a very simple <strong>com</strong>puter within a more<br />

<strong>com</strong>plex <strong>com</strong>puter. This simplicity was part of the original motivation.


The Microprogrammed Control Unit<br />

In a microprogrammed control unit, the control signals correspond to bits in a<br />

micromemory (CROM for Control ROM), which are read into a micro–MBR. This<br />

register is just a set of D flip–flops, the contents of which are emitted as signals.<br />

The micro–control unit ( CU )<br />

1) places an address into the micro–Memory Address Register ( MAR ),<br />

2) the control word is read from the Control Read–Only Memory,<br />

3) puts the microcode word into the micro–Memory Buffer Register, <strong>and</strong><br />

4) the control signals are issued.


Maurice Wilkes<br />

Maurice Wilkes worked in the Computing Laboratory at Cambridge University<br />

beginning in 1936, but mostly from 1945 as he served in WW 2.<br />

He read von Neumann’s preliminary report on the EDVAC in 1946. He immediately<br />

―recognized this as the real thing‖ <strong>and</strong> started on building a stored program <strong>com</strong>puter. In<br />

August 1946 he attended a series of lectures ―Theory <strong>and</strong> Techniques for Design of<br />

Electronic Digital Computers‖ given at the Moore School of Engineering at the<br />

University of Pennsylvania <strong>and</strong> met many of the designers of the ENIAC.<br />

On May 6, 1949 the EDSAC was first operational, <strong>com</strong>puting the values of N 2 for<br />

1 N 99. In 1951, Wilkes published The Preparation of Programs for Electronic<br />

Digital Computers, the first book on programming. I have a 1958 edition.<br />

Also in 1951, Wilkes published a paper ―The Best Way to Design an Automatic<br />

Calculating Machine‖ that described a technique that he microprogramming. This<br />

technique is still in use today <strong>and</strong> still has the same name.<br />

In 1953, Wilkes <strong>and</strong> Stringer further described the technique <strong>and</strong> considered issues of<br />

design <strong>com</strong>plexity, test <strong>and</strong> verification of the control logic, pipelining access to the<br />

control store, <strong>and</strong> support of different ISA (Instruction Set Architectures)<br />

(Wilkes <strong>and</strong> Stringer, 1953).


Wilkes’ Motivations<br />

―As soon as we started programming, we found to our surprise that it wasn’t<br />

as easy to get programs right as we had thought. … I can remember the exact<br />

instant when I realized that a large part of my life from then on was going to<br />

be spent in finding mistakes in my own programs.‖<br />

After his visit to the United States, Wilkes started to worry about the <strong>com</strong>plexity of the<br />

control unit of the EDVAC, then in design. Here is what he wrote later.<br />

“I found that it did indeed have a centralized control based on the use of a matrix<br />

of diodes. It was, however, only capable of producing a fixed sequence of eight<br />

pulses—a different sequence for each instruction, but nevertheless fixed as far as<br />

a particular instruction was concerned. It was not, I think, until I got back to<br />

Cambridge that I realized that the solution was to turn the control unit into a<br />

<strong>com</strong>puter in miniature by adding a second matrix to determine the flow of control<br />

at the microlevel <strong>and</strong> by providing for conditional microinstructions.”<br />

In other words, have the control signals emitted by a smaller <strong>com</strong>puter that is controlled<br />

by a microprogram. The advantage is that the control unit of this smaller <strong>com</strong>puter is<br />

extremely simple to design, test, <strong>and</strong> underst<strong>and</strong>.


A Diode Memory<br />

A diode is a one way current gate. It causes current to flow one way only.<br />

Specifically: For current in one direction, it offers almost no resistance<br />

For current in the opposite direction, it appears as a very large resistance.<br />

A diode memory is just a collection of diodes connected in a matrix.<br />

Follow the current paths. This shows the contents of each word. This is a classic ROM.


Problems in the 1950’s<br />

In 1958, the EDSAC 2 became operational; it was the first microprogrammed <strong>com</strong>puter.<br />

The control unit used ROM made from magnetic cores (Hennessy & Patterson, 1990).<br />

There were two reasons that Wilkes’ idea did not take off in the 1950’s.<br />

1. The simple instruction sets of the time did not dem<strong>and</strong> microprogramming, <strong>and</strong><br />

2. The methods for fabricating a microprogram control store were not adequate.<br />

All of this changed when IBM embraced microprogramming as a method for the<br />

control units of their System/360 design.<br />

We should note that the early control stores for the IBM System/360 were implemented<br />

with technologies that are no obsolete <strong>and</strong> strange to our ears.<br />

BCROS<br />

TROS<br />

CCROS<br />

Balanced Capacitor Read–Only Storage<br />

Two capacitors per word in a storage of 2816 words of 100 bits each.<br />

Transformer Read–Only Storage.<br />

Magnetic core storage of 8192 words of 54 bits each.<br />

Card Capacitor Read–Only Storage.<br />

Mylar cards the size of st<strong>and</strong>ard punch cards with copper tabs.


Early Interest in <strong>Microprogramming</strong><br />

We begin by quoting from the article Readings in <strong>Microprogramming</strong>.<br />

―Microprogram control is seen as a form of simulation in which<br />

primitive operations are <strong>com</strong>bined <strong>and</strong> sequenced so as to imitate<br />

the characteristics of a desired machine.‖<br />

Davies begins his article with a discussion of what then was an important use<br />

of microprogramming – to use one <strong>com</strong>puter to emulate another.<br />

He considers two in<strong>com</strong>patible architectures: the IBM 7040 <strong>and</strong> IBM 7094.<br />

He postulated the following scenario.<br />

1. There is at h<strong>and</strong> an IBM 7094 upon which we want to run a program.<br />

This will be called the host system.<br />

2. There is a large [assembly language] program written for an IBM 7040.<br />

This is called the target system.<br />

The IBM 7094 running IBM 7040 code is called a virtual system.<br />

Source: (Davies, 1972)


<strong>Microprogramming</strong> is Taken Seriously<br />

It was with the introduction of the IBM System/360 that microprogramming was taken<br />

seriously as an option for designing control units. There were three reasons.<br />

1. The recent availability of memory units with sufficient reliability <strong>and</strong><br />

reasonable cost.<br />

2. The fact that IBM took the technology seriously.<br />

3. The fact that IBM aggressively pushed the memory technology inside the<br />

<strong>com</strong>pany to make microprogramming feasible.<br />

IBM’ goals are stated in the 1967 paper by Tucker.<br />

―<strong>Microprogramming</strong> in the System/360 line is not meant to provide the problem<br />

programmer with an instruction set that he can custom–tailor. Quite the<br />

contrary, it has been used to help design a fixed instruction set capable of<br />

reaching across a <strong>com</strong>patible line of machines in a wide range of performances.<br />

… The use of microprogramming has, however, made it feasible for the smaller<br />

models of System/360 to provide the same <strong>com</strong>prehensive instruction set as the<br />

large models.‖<br />

Tucker notes that the use of a ROS [Read Only Store] is somewhat expensive, be<strong>com</strong>ing<br />

attractive only as ―an instruction set be<strong>com</strong>es more <strong>com</strong>prehensive‖.<br />

Source: (Page 225 of Tucker, 1967)


<strong>Microprogramming</strong> is Taken Seriously<br />

(By IBM’s Customers)<br />

The primary intent of the IBM design team was to generate an entire family of <strong>com</strong>puters<br />

with one ISA (Instruction Set Architecture) but many different organizations.<br />

<strong>Microprogramming</strong> allowed <strong>com</strong>puters of a wide range of <strong>com</strong>puting power (<strong>and</strong> cost)<br />

to implement the same instruction set <strong>and</strong> run the same assembly language software.<br />

Several of the IBM product line managers saw another use for microprogramming, one<br />

that their customer base thought to be extremely important: allowing assembly language<br />

programs from earlier models (IBM 1401, IBM 7040, IBM 7094) to run unchanged<br />

on any model of the System/360 series.<br />

As one later author put it, it was only the introduction of microprogramming <strong>and</strong> the<br />

emulation of earlier machines allowed by this feature that prevented ―mass defections‖ of<br />

the IBM customer base to other <strong>com</strong>panies, such as Honeywell, that were certainly<br />

looking for the business.<br />

This idea was proposed <strong>and</strong> named “emulation” by Stewart Tucker (quoted above).


Here I just quote our textbook.<br />

The 1960’s <strong>and</strong> 1970’s<br />

―In the 1960s <strong>and</strong> 1970s, microprogramming was one of the most important<br />

techniques used in implementing machines. Through most of that period,<br />

machines were implemented with discrete <strong>com</strong>ponents or MSI (mediumscale<br />

integration—fewer than 1000 gates per chip), ….[Designers could<br />

choose between a hardwired control unit based on a finite–state–machine<br />

model or a microprogrammed control unit].<br />

The reliance on st<strong>and</strong>ard parts of low- to medium-level integration made these<br />

two design styles radically different. Microprogrammed approaches were<br />

attractive because implementing the control with a large collection of lowdensity<br />

gates was extremely costly. Furthermore, the popularity of relatively<br />

<strong>com</strong>plex instruction sets dem<strong>and</strong>ed a large control unit, making a ROM-based<br />

implementation much more efficient. The hardwired implementations were<br />

faster, but too costly for most machines. Furthermore, it was very difficult to<br />

get the control correct, <strong>and</strong> changing ROMs was easier than replacing a<br />

r<strong>and</strong>om logic control unit. Eventually, microprogrammed control was<br />

implemented in RAM, to allow changes late in the design cycle, <strong>and</strong> even in<br />

the field after a machine shipped.‖


The Microprogram Design Process<br />

Here we make an assertion that is almost true on the face of it: the design <strong>and</strong> testing of a<br />

control unit is one of the more difficult parts of developing a new <strong>com</strong>puter.<br />

In the late 1970’s, microprogramming had be<strong>com</strong>e popular. One of the reasons was the<br />

way in which it facilitated the process of designing the control unit.<br />

<strong>Microprogramming</strong> was quite similar to assembly language programming; many<br />

designers of the time were experts at this.<br />

Microprogram assemblers had been developed <strong>and</strong> were in wide use. The process of<br />

microprogram development was simple:<br />

1. Write the microcode in a symbolic ―microassembly‖<br />

language <strong>and</strong> assemble it into binary microcode.<br />

2. Download the microcode to an EPROM (Erasable<br />

Programmable ROM) using a ROM programmer.<br />

3. Test the microcode, fix the problems, <strong>and</strong> repeat.


The Hardwired Control Unit Design Process<br />

In contrast, prototyping a hardwired control unit took quite a bit of effort. The unit was<br />

built from LSI <strong>and</strong> MSI <strong>com</strong>ponents, wired <strong>and</strong> tested. This was very labor intensive <strong>and</strong><br />

costly, since it most of the work had to be done by degreed engineers.<br />

Recall that in the 1970’s there were few tools to aid hardware design. In particular, there<br />

were no programmable gate arrays to allow quick configuration of hardware <strong>and</strong> no<br />

hardware design languages, such as VHDL, for describing <strong>and</strong> testing a design.<br />

Today, a hardwired control unit is as easy to design <strong>and</strong> test as a microprogrammed unit;<br />

it is first described <strong>and</strong> tested in VHDL.<br />

Source: Page 189 from (Murdocca, 2007)


Benefits of <strong>Microprogramming</strong><br />

As noted above, the primary impediment to adoption of microprogramming was that<br />

sufficiently fast control memory was not readily available.<br />

When the necessary memory became available, microprogramming became popular.<br />

The main advantage of microprogramming was that it h<strong>and</strong>led difficulties associated<br />

with virtual memory, especially those of restarting instructions after page faults.<br />

The IBM System 370 Model 138 implemented virtual memory entirely in microcode<br />

without any hardware support (Hennessy & Patterson, 1990).<br />

Here is a personal memory, dating from the early 1980’s. At that time <strong>com</strong>puters for the<br />

direct execution of the LISP programming language were popular, <strong>and</strong> there were two<br />

major <strong>com</strong>petitors: Symbolics <strong>and</strong> LMI.<br />

At a meeting in Austin, TX, the results of a benchmark <strong>com</strong>petition were announced.<br />

Early in the <strong>com</strong>petition, the LMI – 1 had fared poorly, running at about half of the speed<br />

of the Symbolics –3670. The LMI engineers immediately redesigned the control store<br />

to execute code found in the benchmark. By the <strong>com</strong>petition, the LMI – 1 was officially<br />

a bit faster than the Symbolics – 3670.


The IBM XT/370<br />

IBM was attempting to regain dominance in the desktop market.<br />

They noted that both the S/370 <strong>and</strong> the Motorola 68000 used sixteen 32–bit general<br />

purpose registers.<br />

In 1984 IBM announced the XT/370, a ―370 on a desktop‖, a pair of Motorola 68000s re–<br />

microprogrammed to emulate the S/370 instruction set. Two units were required because<br />

the control store on the Motorola was too small for the S/370.<br />

As a <strong>com</strong>puter the project was successful. It failed because IBM wanted full S/370 prices<br />

for the software to run on the XT/370.<br />

Source: Page 189 from (Murdocca, 2007)<br />

Confirmed on the IBM Web Site (Kozuh, 1984)


Side–Effects of <strong>Microprogramming</strong><br />

It is a simple fact that the introduction of microprogramming allowed the development of<br />

Instruction Set Architectures of almost arbitrary <strong>com</strong>plexity.<br />

The VAX series of <strong>com</strong>puters, marketed by the Digital Equipment Corporation, is usually<br />

seen as the ―high water mark‖ of microprogrammed designs. The later VAX designs<br />

supported an Instruction Set Architecture with more than 300 instructions <strong>and</strong> more than<br />

a dozen addressing modes.<br />

When examining the IA–32 Instruction Set Architecture, we may not a number of<br />

instructions of significant <strong>com</strong>plexity. These were introduced to support high–level<br />

languages (remember the ―semantic gap‖). It was later discovered that these were rarely<br />

used by <strong>com</strong>pilers, but the ―legacy code‖ issue forced their retention.<br />

It is now the case that the existence of these instructions in the IA–32 ISA required that<br />

part of the control unit be microprogrammed; a hardwired control unit would be too<br />

<strong>com</strong>plex. The ghost of the Intel 80286 still haunts us.


VHDL<br />

The VHDL was proposed in the late 1980’s (IEEE St<strong>and</strong>ard 1076–1987) <strong>and</strong> refined in<br />

the 1990’s (IEEE St<strong>and</strong>ards 1164 <strong>and</strong> 1076–1993). The term VHDL st<strong>and</strong>s for<br />

VHSIC (Very High Speed Integrated Circuits) Hardware Description Language.<br />

Here is the VHDL description of a two–input AND gate.<br />

entity AND2 is<br />

port (in1, in2: in std_logic;<br />

out1: out std_logic);<br />

end AND2;<br />

architecture behavioral_2 of AND2 is<br />

begin<br />

end behavioral_2;<br />

out1


<strong>Microprogramming</strong> <strong>and</strong> Memory Technologies<br />

The drawback of microcode has always been memory performance; the CPU<br />

clock cycle is limited by the time to read the memory.<br />

In the 1950’s, microprogramming was impractical for two reasons.<br />

1. The memory available was not reliable, <strong>and</strong><br />

2. The memory available was the same slow core memory as used in<br />

the main memory of the <strong>com</strong>puter.<br />

In the late 1960’s, semiconductor memory (SRAM) became available for the<br />

control store. It was ten times faster than the DRAM used in main memory. It<br />

is this speed difference that opened the way for microcode.<br />

In the late 1970’s, cache memories using the SRAM became popular. At this<br />

point, the CROM lost its speed advantage.<br />

―For these reasons, instruction sets invented since 1985 have not relied on<br />

microcode‖ (Hennessy & Patterson, 1990).


<strong>Microprogramming</strong>: The Late <strong>Evolution</strong><br />

―The Mc2 [microprogramming control] level was the st<strong>and</strong>ard design for practically all<br />

<strong>com</strong>mercial <strong>com</strong>puters until load/store architectures became fashionable in the 1980s‖.<br />

Events that lead to the reduced emphasis on microprogramming include:<br />

1. The availability of VLSI technology, which allowed a number of improvements,<br />

including on–chip cache memory, at reasonable cost.<br />

2. The availability of ASIC (Application Specific Integrated Circuits) <strong>and</strong> FPGA<br />

(Field Programmable Gate Arrays), each of which could be used to create<br />

custom circuits that were easily tested <strong>and</strong> reconfigured.<br />

3. The beginning of the RISC (Reduced Instruction Set Computer) movement, with<br />

its realization that <strong>com</strong>plex instruction sets were not required.<br />

Modern design practice favors a ―mixed control unit‖ with hardwired control for the<br />

simpler (<strong>and</strong> more <strong>com</strong>mon) instructions <strong>and</strong> microcode implementation of the more<br />

<strong>com</strong>plex (mainly legacy code) instructions.<br />

The later versions (80486 <strong>and</strong> following) of the Intel IA–32 architecture provide a good<br />

example of this ―mixed mode‖ control unit. We examine these to close the lecture.<br />

(page 618 of Warford, 2005)


The IA–32 Control Unit<br />

In order to underst<strong>and</strong> the IA–32 control unit, we must first <strong>com</strong>ment on a fact of<br />

instruction execution in the MIPS. Every instruction in the MIPS can be executed in one<br />

pass through the data path. What is meant by that?<br />

In this chapter, we have studied two variants of the MIPS data path.<br />

1. A single–cycle implementation in which every instruction is <strong>com</strong>pletely<br />

executed in one cycle, hence one pass through the data path.<br />

2. A multi–cycle implementation, in which the execution of each instruction is<br />

divided into 3, 4, or 5 phases, with one clock pulse per phase.<br />

Even here, the instructions can be viewed as taking one pass through the data path.<br />

The MIPS was designed as a RISC machine. Part of this design philosophy calls for<br />

efficient execution of instructions; the single pass through the data path is one result.<br />

The IA–32 architecture, with its requirement for support of legacy designs, is one<br />

example of a CISC (Complex Instruction Set Computer). Some instructions can be<br />

executed in 3 or 4 clock cycles, but some require hundreds of clock cycles.<br />

The design challenge for the later IA–32 implementations is how to provide for quick<br />

execution of the simpler instructions without penalizing the more <strong>com</strong>plex ones.


The IA–32 Control Unit (Part 2)<br />

The later implementations of the IA–32 have used a <strong>com</strong>bination of hardwired <strong>and</strong><br />

microprogrammed control in the design of the control units.<br />

The choice of the control method depends on the <strong>com</strong>plexity of the instruction.<br />

The hardwired control unit is used for all instructions that are simple enough to be<br />

executed in a single pass through the datapath. Fortunately, these instructions are<br />

the most <strong>com</strong>mon in most executable code.<br />

Instructions that are too <strong>com</strong>plex to be h<strong>and</strong>led in one pass through the datapath are<br />

passed to the microprogrammed controller.<br />

IA–32 designs beginning with the Pentium 4 have addressed the <strong>com</strong>plexity inherent in<br />

the IA–32 instruction set architecture in an entirely new way, which might be called a<br />

―RISC Core‖. Each 32–bit instruction is mapped into a number of micro–operations.<br />

In the Pentium 4, the micro–operations are stored in a trace cache, which is form of a<br />

Level–1 Instruction Cache (I–Cache). Each instruction is executed from the trace cache.<br />

There are two possibilities, either the micro–operations are passed to the hardwired<br />

control unit, or a routine in the microprogrammed control ROM is called.


References<br />

(Davies, 1972) Readings in microprogramming, P. M. Davies, IBM Systems Journal,<br />

Vol. 11, No.1, pages 16 –40, 1972<br />

(Hennessy & Patterson, 1990) Computer Architecture: A Quantitative Approach,<br />

ISBN 1 – 55860 – 069 – 8, Sections 5.9 & 5.10 (pages 240 – 243).<br />

(Kozuh, 1984) System/370 capability in a desktop <strong>com</strong>puter, F. T. Kozuh, et. al.,<br />

IBM Systems Journal, Volume 23, Number 3, Page 245 (1984).<br />

(Murdocca, 2007) Computer Architecture <strong>and</strong> Organization,<br />

Miles Murdocca <strong>and</strong> Vincent Heuring, John Wiley & Sons, 2007 ISBN 978 – 0 – 471 – 73388 – 1.<br />

(Tucker, 1967) Microprogram control for System/360, S. G. Tucker, IBM Systems Journal,<br />

Vol. 6, No 4. pages 222 – 241 (1967)<br />

(Warford, 2005) Computer Systems, Jones <strong>and</strong> Bartlett, 2005 ISBN 0 – 7637 – 3239 – 7<br />

(Wilkes <strong>and</strong> Stringer, 1953) <strong>Microprogramming</strong> <strong>and</strong> the Design of the Control Circuits in an<br />

Electronic Digital Computer. Proc Cambridge Phil Soc 49:230-238, 1953.<br />

- Reprinted as chapter 11 in: DP Siewiorek, CG Bell, <strong>and</strong> A Newell. Computer Structures:<br />

Principles <strong>and</strong> Examples. New York: McGraw-Hill, 1982, ISBN 0 – 07 – 057302 – 6.<br />

- Also reprinted in: MV Wilkes. The Genesis of <strong>Microprogramming</strong>. Annals Hist. Computing<br />

8n3:116-126, 1986.

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