Unit – 3 Session - 12 Data Processing Circuits - VTU e-Learning ...

10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
Unit – 3
Session - 12
Data Processing Circuits
Objectives
• Review of Programmable ROM (PROM) and Erasable PROM (EPROM)
• Describe Programmable Logic Devices (PLDs): Programmable Array Logic (PAL) and
Programmable Logic Array (PLA)
Programmable ROMs
A programmable ROM (PROM) allows the user instead of the manufacturer to store the data. Mask
ROM (MROM) is a type of ROM whose contents are programmed by the IC manufacturer.
PROM
It is also called field programmable ROM (FPROM) or one-time programmable non-volatile memory
(OTP NVM).
PROM Programmer
User with the help of an instrument called a PROM programmer can program the PROM.
Programming a PROM
Consider the diode ROM. Originally, all diodes are connected at the cross points. Each of these diodes
has a fusible link ( a small fuse). The process of programming a PROM chip is called PROM ‘burning in’.
It involves burning or blowing out the fuses of selected memory cells whose value needs to be altered.
Programming like this is permanent. Data cannot be erased after it has been burned in.
The PROM programmer is first configured so that it contains the desired PROM burning instructions.
Next, the PROM chip is inserted into the ZIF socket. The PROM programmer sends a high voltage pulse
(12 to 21 V) only to the fuses belonging to memory cells whose value has to be changed from 1 to 0.
The high voltage causes the selected fuse to blow out or burn out. The burned out fuse no longer
connects a column to a row in a memory cell. The memory cell with a burned out fuse has a value 0
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
Disadvantage of PROM
There is a limit on the number of input variables. Typically, PROMs have 8 inputs or less.
Drawing a PROM logic circuit
It is cumbersome to draw large PROM circuit with all the diodes. An alternative, streamlined drawing
procedure for PROMs is used. The simplified diagram of PROM is as shown:
Universal Logic Solution
PROM is an universal logic solution. The AND gates generate all the fundamental products and the user
can then OR these products as needed to generate any Boolean output.
Example:
Realize a full adder using a PROM.
Solution:
The truth table of the full adder is as shown:
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
Inputs
Outputs
A B Ci S Co
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
The full adder using PROM is realized as shown below:
Erasable PROMs
The erasable PROM (EPROM) uses metal-oxide semiconductor field-effect effect transistors (MOSFETs). It has
an array of floating-gate gate transistors individually programmed by an EPROM programmer. Storing data in
the memory requires selecting a given address and applying a higher voltage to the transistors.
Erasing EPROM contents
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
The stored data is erased by exposing the die to ultraviolet (UV) light. The UV light passes through the
quartz window in the IC package and releases all stored charges. The effect is to erase the stored
contents.
EPROM ICs
Some important EPROM IC types are listed below:
2716 16 K bits organized as 2048 x 8 (2 KB)
2732 32 K bits organized as 4096 x 8 (4 KB)
27256 256 K bits organized as 32768 x 8 (32 KB)
Importance of EPROM
The EPROM is useful in project development. The designer can modify the contents until the stored
data is perfect. When the design is finalized, the data can be burned into PROM.
Programmable Array Logic
Programmable Array Logic (PAL) is a programmable array of logic gates on a single chip. PAL is different
from a PROM. It has a programmable AND array and a fixed OR array. The structure of PAL is as shown
below:
Programming a PAL
With a PROM programmer, we can burn in the desired fundamental products, which are then ORed by
the fixed output connections.
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
Example:
Realize a full adder using PAL.
Solution:
The output expressions of a full adder are:
S = Σ m(1, 2, 4, 7)
Co = Σ m(3, 5, 6, 7)
Full adder is realized using PAL as shown below:
PAL ICs
Some important PAL IC types are listed below:
10H8
16H2
14L4
10 input and 8 output AND-OR
6 input and 2 output AND-OR
14 input and 4 output AND-OR-INVERT
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
PAL - Pros and Cons
PALs are not an universal logic solution. Only some of the fundamental products can be generated and
ORed at the final outputs. But PALs have enough flexibility to produce all kinds of complicated logic
functions. PALs have the advantage of 16 inputs compared to the typical limit of 8 inputs for PROMs.
Programmable Logic Arrays
In Programmable Logic Arrays (PLAs) both the AND array and the OR array are programmable. PLAs
along with ROMs and PALs, are included in the more general classification of ICs called programmable
logic devices (PLDs).
PLDs
The block diagrams of the three PLDs are as shown below:
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
The structure of Programmable Logic Array (PLA) is as shown below:
We can use PLA for combinational logic circuit design.
Example:
Realize a 7-segment decoder using PLA.
Solution:
The truth table of 7-segment decoder is as shown:
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
BCD Input
Outputs
A B C D a b c d e f g
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 1 1 1 1 1 0 0 1
0 0 0 1 1 0 0 1 1
0 1 1 0 1 1 0 1 1
1 0 1 0 1 1 1 1 1
1 1 1 1 1 0 0 0 0
0 0 1 1 1 1 1 1 1
0 1 1 1 1 0 0 1 1
The 7-segment decoder is realized using PLA as shown below:
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10CS 33 LOGIC DESIGN
UNIT – 3 Data Processing Circuits
Questions
1. Mention different types of ROMs and explain each of them.
2. Implement the following Boolean functions using an appropriate PLA:
F1(A, B, C) = ∑m(0, 4, 7); F2 (A, B, C) = ∑m(4, 6).
3. What are the different types of PLDs? Implement the 7-segment decoder using PLA.
4. Implement the following function using PLA:
X = A’B’C + AB’C’ + B’C; Y = A’B’C + AB’C’; Z = B’C
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