V54C3128(16/80/40)4VC 128Mbit SDRAM 3.3 VOLT, TSOP II / BGA ...

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ProMOS TECHNOLOGIES V54C3128(16/80/40)4VC AC Characteristics 1,2, 3 T A = 0 to 70 °C (Commercial), -40 to 85°C (Industrial); -40 to 105°C (Wide), -40 to 125°C (Extended) V SS = 0 V; V DD = 3.3 V ± 0.3 V, t T = 1 ns Limit Values -5 -6 -7PC -7 -10 # Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Note Clock and Clock Enable 1 t CK Clock Cycle Time CAS Latency = 3 CAS Latency = 2 5 – – – 6 – – – 7 7.5 – – 7 10 – – 10 10 – – s ns ns 2 f CK Clock Frequency CAS Latency = 3 CAS Latency = 2 – – 200 – – – 166 – – – 143 133 – – 143 100 – – 100 100 MHz MHz 3 t AC Access Time from Clock CAS Latency = 3 CAS Latency = 2 – _ 4.5 – – _ 5.4 – – _ 5.4 5.4 – _ 5.4 6 – _ 6 6 ns ns 2, 4 4 t CH Clock High Pulse Width 2 – 2.5 – 2.5 – 2.5 – 2.5 – ns 5 t CL Clock Low Pulse Width 2 – 2.5 – 2.5 – 2.5 – 2.5 – ns 6 t T Transition Time 0.3 1.2 0.3 1.2 0.3 1.2 0.3 1.2 0.3 1.2 ns Setup and Hold Times 7 t IS Input Setup Time 1.5 – 1.5 – 1.5 – 1.5 – 1.5 – ns 5 8 t IH Input Hold Time 0.8 – 0.8 – 0.8 – 0.8 – 0.8 – ns 5 9 t MRD Mode Register Set to Command delay 2 – 2 – 2 – 2 – 2 – CLK 10 t SB Power Down Mode Entry Time 0 5 0 6 0 7 0 7 0 7 ns 11 t DS Data-in setup time 1.5 – 1.5 – 1.5 – 1.5 – 1.5 – ns 12 t DH Data-in hold time 0.8 – 0.8 – 0.8 – 0.8 – 0.8 – ns Common Parameters 13 t RCD Row to Column Delay Time 15 – 18 – 20 – 20 – 20 – ns 6 14 t RP Row Precharge Time 15 – 18 – 20 – 20 – 20 – ns 6 15 t RAS Row Active Time 40 100K 42 100K 42 100K 42 100K 50 100K ns 6 16 t RC Row Cycle Time 55 – 60 – 65 – 65 – 70 – ns 6 17 t RRD Activate(a) to Activate(b) Command Period 12 – 12 – 14 – 14 – 20 – ns 6 18 t CCD CAS(a) to CAS(b) Command Period 1 – 1 – 1 – 1 – 1 – CLK 19 t DPL Data-in to Precharge Command for Manual precharge 2 – 2 – 2 – 2 – 2 – CLK Refresh Cycle 20 t RFC Row Refresh Cycle Time 55 — 60 — 60 — 70 — 70 — ns 6 21 t REF Refresh Period (4096 cycles) — 64 — 64 — 64 — 64 — 64 ms 22 t SREX Self Refresh Exit Time 1 — 1 — 1 — 1 — 1 — CLK V54C3128(16/80/40)4VC Rev. 1.3 November 2008 18
ProMOS TECHNOLOGIES V54C3128(16/80/40)4VC Limit Values -5 -6 -7PC -7 -10 # Symbol Parameter Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit Note Read Cycle 23 t OH Data Out Hold Time 2 – 2.5 – 2.5 – 2.5 – 2.5 – ns 2 24 t LZ Data Out to Low Impedance Time 1 – 1 – 1 – 1 – 1 – ns 25 t HZ Data Out to High Impedance Time CAS Latency = 3 CAS Latency = 2 – _ 4.5 4.5 – _ 5.4 5.4 – _ 5.4 5.4 – _ 5.4 5.4 – _ 6 6 ns ns 7 26 t DQZ DQM Data Out Disable Latency – 2 – 2 – 2 – 2 – 2 CLK Write Cycle 27 t WR Write Recovery Time 2 – 2 – 2 – 2 – 2 – CLK 28 t DAL Last data in to Active command 2*CLK +t RP – 2*CLK +t RP – 2*CLK +t RP – 2*CLK +t RP – 2*CLK +t RP – ns Notes for AC Parameters: 1. For proper power-up see the operation section of this data sheet. 2. AC timing tests have V IL = 0.8V and V IH = 2.0V with the timing referenced to the 1.4 V crossover point. The transition time is measured between V IH and V IL . All AC measurements assume t T = 1ns with the AC output load circuit shown in Figure 1. CLK VIH VIL + 1.4 V tIS tIH COMMAND 1.4V Z=50 Ohm tAC tLZ tAC tOH t T Figure 1. 50 Ohm I/O 50 pF OUTPUT 1.4V tHZ 4. If 1.2ns < t T < t CK /2, a time (t T /2 – 0.5)ns has to be added to this parameter. t T = CLK t T . 5. If 1.2ns < t T < t CK /2, a time (t T – 1)ns has to be added to this parameter. t T = (CLK t T + Command t T ) / 2. 6. These parameter account for the number of clock cycle and depend on the operating frequency of the clock, as follows: the number of clock cycle = specified value of timing period (counted in fractions as a whole number) Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high. Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command is registered. 7. Referenced to the time which the output achieves the open circuit condition, not to output voltage levels. V54C3128(16/80/40)4VC Rev. 1.3 November 2008 19
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