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VDM-10 Language Manual

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<strong>VDM</strong>-<strong>10</strong> <strong>Language</strong> <strong>Manual</strong><br />

If cycles statements are nested, the outermost one takes precedence and the remainder are<br />

ignored. For instance<br />

✞<br />

✡✝<br />

cycles(3000)(<br />

n := 1;<br />

while n < <strong>10</strong> do<br />

cycles(<strong>10</strong>00) n := n + 1;<br />

)<br />

The outer cycles statement takes precedence, so assuming this is not executed in the context<br />

of an enclosing cycles statement, the interpreter would increment its internal clock by the<br />

time it takes to process 3000 instructions on the given CPU when executing this statement.<br />

Note that nesting can occur due to operation calls. Consider the following example:<br />

✞<br />

op1 : nat ==> nat<br />

op1(m) ==<br />

cycles (2000) return m + 1;<br />

✆<br />

✡✝<br />

op2 : () ==> nat<br />

op2() ==<br />

(dcl n : nat := 3;<br />

cycles(<strong>10</strong>00) n := op1(1);<br />

return n)<br />

✆<br />

When executing op2, if the call to op1 is executed, the cycles statement in op1 will be<br />

overridden by the cycles statement in the environment of the call. Thus in op2 following<br />

execution of the statement n := op1(1); the internal clock is incremented by the time it<br />

takes to process <strong>10</strong>00 instructions on the given CPU only.<br />

124

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