VDM-10 Language Manual

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$Course Material\Efficiently Coding Communication Protocols in C++ ...$

VDM-10 Language Manual Thus, a flat specification is made up of several definition blocks. However, only one state definition is allowed. The following is an example of a flat top-level specification: ✞ values st1 = mk_St([3,2,-9,11,5,3]) state St of l:seq1 of nat end functions min_index : seq1 of nat -> nat min_index(l) == if len l = 1 then 1 else let mi = min_index(tl l) in if l(mi+1) < hd l then mi+1 else 1 operations SelectionSort : nat ==> () SelectionSort (i) == if i < len l then (dcl temp: nat; dcl mi : nat := min_index(l(i,...,len l)) + i - 1; ✡✝ temp := l(mi); l(mi) := l(i); l(i) := temp; SelectionSort(i+1) ) ✆ 152
Chapter 17. Top-level Specification (VDM-SL) 17.2 A Structured Specification As an extension to the standard VDM-SL language, it is possible to structure an VDM-SL specification using modules. In this section, the use of modules to create the top-level specification will be described. With the structuring facilities offered by VDM-SL it is possible to: • Export constructs from a module. • Import constructs from a module. • Rename constructs upon import. • Define a state in a module. 17.2.1 The Layout of a Module Before the actual facilities are described, the general layout of a module is described. A module consists of three parts: a module declaration, an interface section, and a definitions section. It is possible to leave out the definitions part in the early development of a module specification. In the module declaration, the module is named. The name must be a unique module name within the complete specification. The second part, the interface section, defines the relation of a module with other modules and consists of a number of sections. These sections are: • An imports section. In the imports section, all the constructs that are going to be used from other modules are described. If constructs are going to be renamed it has to be done in the imports section. • An exports section. Here all the constructs that are going to be used in other modules are defined. If no exports section is present the module cannot be used from other modules. The third part of a module declaration, the definitions section, contains all the definitions of the module. Thus, in general, the syntax of a module is: Syntax: module = ‘module’, identifier, interface, [ module body ], ‘end’, identifier ; module body = ‘definitions’, definition block, { definition block } ; To illustrate the use of modules, the example flat top-level specification are rewritten with some minor modifications. Some unimportant parts of the flat specification are left out for clarity. 153
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Overture - Open-source Tools for Fo
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Contents 1 Introduction 1 1.1 The V
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CONTENTS 13 Statements 97 13.1 Let
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CONTENTS A.7.19 The Undefined Expre
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Chapter 1 Introduction The Vienna D
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Chapter 2 Concrete Syntax Notation
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Chapter 3 Data Type Definitions As
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Chapter 3. Data Type Definitions We
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Chapter 3. Data Type Definitions Op
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Chapter 3. Data Type Definitions (a
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Chapter 3. Data Type Definitions Th
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Chapter 4 Algorithm Definitions In
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Chapter 5 Function Definitions In t
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Chapter 5. Function Definitions Not
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Chapter 5. Function Definitions Thi
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Chapter 6 Expressions In this subse
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Chapter 6. Expressions ✡✝ mk_Sc
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Chapter 6. Expressions Examples: Th
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Chapter 6. Expressions where e1 is
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Chapter 6. Expressions all expressi
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Chapter 6. Expressions where bd is
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Chapter 6. Expressions 6.8 Sequence
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Chapter 6. Expressions where all th
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Chapter 6. Expressions mu operator.
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Chapter 6. Expressions new expressi
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Chapter 6. Expressions Examples: Us
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Chapter 6. Expressions which will r
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Chapter 6. Expressions Examples: As
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Chapter 6. Expressions • #active(
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Chapter 6. Expressions ✞ state si
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Chapter 6. Expressions Semantics: A
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Chapter 7 Patterns Syntax: pattern
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Chapter 7. Patterns In the followin
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Chapter 7. Patterns ✡✝ ✆ The
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Chapter 8 Bindings Syntax: bind = s
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Chapter 9 Value (Constant) Definiti
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Chapter 10 Instance Variables (VDM+
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Chapter 11 The State Definition (VD
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Chapter 11. The State Definition (V
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Chapter 12 Operation Definitions Op
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Chapter 12. Operation Definitions s
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Chapter 13 Statements In this secti
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Chapter 13. Statements ✡✝ def t
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Page 133 and 134: Chapter 14 Top-level Specification
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Page 169 and 170: Chapter 18 Trace Definitions In ord
Page 171 and 172: Chapter 18. Trace Definitions stack
Page 173 and 174: Chapter 19 Static Semantics VDM spe
Page 175 and 176: Chapter 20 Scope Conflicts (VDM++ a
Page 177 and 178: References [Ada LRM] [Bicarregui&94
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Page 181 and 182: Appendix A The Syntax of the VDM La
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Page 207 and 208: Appendix B Lexical Specification B.
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Appendix B. Lexical Specification S
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Appendix C Operator Precedence The
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Appendix C. Operator Precedence eva
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Appendix C. Operator Precedence pre
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Appendix D Differences between the
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Index abs, 9 and, 6 card, 14 comp f
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INDEX arithmetic minus, 185 arithme
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INDEX boolean type, 6 char, 11 func
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INDEX sequence enumeration, 53, 187
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