Design and Development of a generic DVB- RCS terminal ...
Design and Development of a generic DVB- RCS terminal ...
Design and Development of a generic DVB- RCS terminal ...
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<strong>Design</strong> <strong>and</strong> <strong>Development</strong> <strong>of</strong> a <strong>generic</strong> <strong>DVB</strong>-<br />
<strong>RCS</strong> <strong>terminal</strong> architecture based on the LEON<br />
CPU core – DELOS<br />
by<br />
Nikos Mouratidis, Spyros Tombros(Keletron<br />
Ltd), Michael<br />
Kokkinos(Siemens Hellas), Michael Theologou(NTUA),<br />
Ferdin<strong>and</strong> Schlapansky(Siemens Siemens PSE)<br />
Paper presentation at the 9 th International Workshop on Signal Processing<br />
for Space Communications –SPSC 2006<br />
Nordwijk, , ESTEC, 11-13/09/2006<br />
13/09/2006
Presentation Topics<br />
? Objectives <strong>of</strong> the paper<br />
? Introduction to DELOS IP-core<br />
? Requirements dictating its development<br />
? IP-core’s architecture<br />
? Features<br />
? Exploitation Aspects<br />
2
Objectives<br />
? Present the architecture <strong>of</strong> an embedded system that<br />
realizes the protocol stack <strong>of</strong> <strong>DVB</strong>-<strong>RCS</strong> <strong>terminal</strong>s.<br />
? Outline its provided functions <strong>and</strong> explain how they should<br />
be complemented by external logic when building <strong>DVB</strong>-<strong>RCS</strong><br />
<strong>terminal</strong>s.<br />
? Present the building blocks <strong>of</strong> the system architecture.<br />
? Outline their functionality <strong>and</strong> contribution to <strong>DVB</strong>-<strong>RCS</strong><br />
logic.<br />
? Give integration possibilities<br />
3
Introduction to DELOS IP-core (1)<br />
? Physical Positioning<br />
ODU<br />
IDU<br />
AFI<br />
UIU<br />
RX<br />
Unit<br />
(LNB)<br />
TX Unit<br />
(BUC)<br />
IFL<br />
Digital &<br />
Analog<br />
Signal<br />
Processing<br />
Functions<br />
Forward &Return<br />
Channel<br />
Protocol<br />
Processor<br />
User<br />
Interface<br />
Logic<br />
Network Interface Unit<br />
Control<br />
? Exploited interfaces:<br />
? User Interface Unit (UIU)<br />
? Analog front-end interface (AFI)<br />
? Control Interface<br />
DELOS IP-core<br />
4
Introduction to DELOS IP-core (2)<br />
? Physical dimensioning:<br />
? HW/SW IP-core<br />
? Mappable on FPGAs or ASICs<br />
? Internal Structure:<br />
? Implements both C <strong>and</strong> U-planes<br />
? Generic interfaces towards external units<br />
? Fully Satlabs compliant protocol operation<br />
? Generic architecture covering:<br />
? User traffic policing<br />
? Full IP compatibility<br />
? Generic SW interfaces to User <strong>terminal</strong>s<br />
? Interfaces for remote management<br />
5
Requirements (1)<br />
? Low level user requirements (Terminal Manufacturers)<br />
? A single entity implementing the <strong>DVB</strong>-<strong>RCS</strong> protocol stacks in SW.<br />
? Re-programmability <strong>and</strong> upgradeability to incorporate future Satlabs<br />
recommendations.<br />
? Generic interfaces for control, data <strong>and</strong> signaling.<br />
? Versatility in implementation so as to be re-usable in any <strong>terminal</strong> design types<br />
(ASIC, FPGA, pure S<strong>of</strong>tware).<br />
? Ability for internal algorithms alteration.<br />
? St<strong>and</strong>ard interfaces for remote control.<br />
? Hardware <strong>and</strong> s<strong>of</strong>tware reprogramming.<br />
? Low-price.<br />
? Re-usability.<br />
? Configurable downlink <strong>and</strong> uplink rates.<br />
6
Requirements (2)<br />
? High level user requirements (Users)<br />
? Configurable rates & flexible traffic policing schemes.<br />
? Full IP compatibility.<br />
? Open architecture to new st<strong>and</strong>ards.<br />
? Low price.<br />
? Flexible <strong>and</strong> easy-to-use.<br />
? No need for bulky <strong>and</strong> complex configurations.<br />
7
Requirements (3)<br />
? Requirements for <strong>DVB</strong>-<strong>RCS</strong> functionality<br />
? Compliance to current <strong>and</strong> future Satlabs recommendations.<br />
? Shall be able <strong>of</strong> communicating using 54Mbps forward <strong>and</strong> 4Mbps return links<br />
? Shall allow simultaneous execution <strong>of</strong> more than two user applications.<br />
? All variable <strong>DVB</strong>-<strong>RCS</strong> communication parameters should be accessible to user s<strong>of</strong>tware via<br />
special registers.<br />
? To ensure low end prices the HW <strong>and</strong> SW <strong>of</strong> the core should be developed using licensefree<br />
development <strong>and</strong> real time environment platforms.<br />
? Its control interface must support SNMP protocol.<br />
? Shall be able <strong>of</strong> h<strong>and</strong>ling user traffic (in MPEG2-TS or ATM formats) + Signalling.<br />
? Shall be able <strong>of</strong> decoding signaling messages sent by the network <strong>and</strong> associate their<br />
meaning with the user traffic.<br />
? Shall support all m<strong>and</strong>atory user signaling operations (login, link synchronization, logout).<br />
? Shall be responsible for monitoring clock fluctuations <strong>and</strong> perform necessary actions for<br />
adjusting the clock frequency <strong>of</strong> the front-end interface.<br />
8
Architecture – General (1)<br />
? Building Blocks:<br />
? Protocol Accelerator<br />
? MAC functions<br />
? Protocol Stacks<br />
? Interfaces to external logic:<br />
? PCI to <strong>terminal</strong> hosts<br />
? Control logic for logic configuration<br />
& programming.<br />
? Front-End to Analog Circuitry<br />
(FIFO Type).<br />
9
Architecture – General (2)<br />
? <strong>DVB</strong>-<strong>RCS</strong> Protocol Stacks: Implements the Finite State Machine (FSM) for the<br />
control (signalling) <strong>and</strong> user plane operations in accordance with the <strong>DVB</strong>-<strong>RCS</strong><br />
protocol requirements set by ETSI <strong>and</strong> Satlabs variations.<br />
? MAC Functions: realises procedures relating to incoming data streams recognition,<br />
error control, distinction between data <strong>and</strong> control information, disassembly <strong>and</strong><br />
classification into the memory queue. On the outgoing direction, it performs user <strong>and</strong><br />
control traffic assembly <strong>and</strong> multiplexing in MPEG2-TS or ATM streams.<br />
? Protocol Accelerator: Hosts traffic shaping schemes for h<strong>and</strong>ling the outgoing user<br />
traffic according to the rate requirements <strong>of</strong> his application.<br />
? H/W Logical Interfaces: Implement st<strong>and</strong>ard buses towards the host <strong>terminal</strong>, the<br />
user application <strong>and</strong> the front-end analog circuitry.<br />
? S/W Logical Interfaces: Implement SW APIs towards the host <strong>terminal</strong> to be used by<br />
potential applications <strong>and</strong> system derivers for exchanging data traffic <strong>and</strong> control<br />
information with the IP-core.<br />
? The LEON-2 CPU core <strong>of</strong>fers the runtime environment for hosting both the s<strong>of</strong>tware<br />
<strong>and</strong> hardware logic <strong>of</strong> the IP-core.<br />
10
Architecture – Hardware Part<br />
Management, Configuration <strong>and</strong> Monitoring<br />
Data <strong>and</strong> Signaling Traffic<br />
Instruction<br />
Cache<br />
DMA Controller<br />
Flash<br />
SDRAM/<br />
SRAM<br />
Expansion<br />
Bus<br />
LEON<br />
CPU<br />
Core<br />
Bus<br />
Arbitration<br />
Data<br />
Cache<br />
SDRAM/SRAM<br />
Controller<br />
System Bus (AMBA AHB)<br />
Protocol<br />
Accelerator<br />
MAC<br />
Controller<br />
MII<br />
Interface<br />
UIU Interfaces<br />
UIU<br />
(Data &<br />
Management)<br />
DSP <strong>and</strong><br />
Analog<br />
Functions<br />
Front-End<br />
Interface<br />
St<strong>and</strong>ard 32 bit<br />
bus (for PCI)<br />
11
Architecture-S<strong>of</strong>tware Part (1)<br />
Call Control<br />
? Based on Linux runtime<br />
Environment<br />
? Communication with the<br />
H/W is implemented via<br />
Linux OS<br />
<strong>DVB</strong>-<strong>RCS</strong><br />
Protocol<br />
Stack<br />
Library<br />
User Applications<br />
Management<br />
Functions<br />
IP-core s<strong>of</strong>tware part<br />
Linux Drivers<br />
<strong>DVB</strong>-<strong>RCS</strong> Driver<br />
UIU Driver<br />
Linux Kernel<br />
Front-End Interface<br />
UIU Interfaces<br />
IP-core hardware<br />
12
Architecture-S<strong>of</strong>tware Part (2)<br />
Interfaces to Terminal Environment<br />
Protocol Execution Engine<br />
TIM SPT SCT FCT TCT TBTP CMT PCR<br />
MAC Messages<br />
Private Sections<br />
Prefix<br />
SAC<br />
Minislot<br />
DULM<br />
MPEG2-TS<br />
Forward Link<br />
MPEG2-TS or ATM TRFs<br />
Return Link<br />
MAC Functions<br />
13
Architecture-S<strong>of</strong>tware Part (3)<br />
SW Interface<br />
Signalling<br />
Stack Execution<br />
Engine<br />
Protocol<br />
Accelerator<br />
Memory<br />
Classifier<br />
<strong>DVB</strong>-S & ATM Packet<br />
Assembler<br />
Packet Recogniser &<br />
Disassembler<br />
Multiplexer<br />
(Time-slot Assigner)<br />
HW Interface<br />
14
Architecture-S<strong>of</strong>tware Part (4)<br />
SW<br />
Interface<br />
IP Packets<br />
Classifier<br />
Traffic<br />
Scheduler/<br />
Policer<br />
Traffic Memories<br />
Bank<br />
MAC<br />
Functions<br />
(Packets<br />
formatting)<br />
HW<br />
Interfaces<br />
15
Features – Supported Protocols<br />
? ENH-Type A Forward Link<br />
Control<br />
Management<br />
IP<br />
Bearer<br />
Control<br />
Connection<br />
Control<br />
Fault Config Accounting Performance Security<br />
VCMUX/AAL5<br />
ATM<br />
MPEG2-TS<br />
MPE<br />
Private Sections<br />
MPEG-TS<br />
<strong>DVB</strong>-S<br />
<strong>DVB</strong>-S<br />
? ENH-Type A Return Link<br />
IP<br />
MAC Messages<br />
MPE<br />
VCMUX/<br />
AAL5<br />
Prefix<br />
SAC<br />
Minislot<br />
DULM<br />
MPAF<br />
Protocols Stack for Signalling<br />
Protocols Stack for user traffic<br />
MPEG2-<br />
TS<br />
ATM<br />
Special Bursts (ETSI EN 301 709)<br />
Optional Part<br />
16
Features-Generic Protocols Specification<br />
17
Features-Signaling Protocols Specification<br />
? Forward link<br />
18
Features-Signaling Protocols Specification<br />
? Return link<br />
19
Exploitation Aspects<br />
DELOS IP-core<br />
MII or MAC interface<br />
Ethernet 10/100/1000<br />
IP Backbone<br />
ODU<br />
IDU<br />
RX<br />
Unit<br />
(LNB)<br />
TX Unit<br />
(BUC)<br />
IFL<br />
Digital &<br />
Analog<br />
Signal<br />
Processing<br />
Functions<br />
Forward &Return<br />
Channel<br />
Protocol<br />
Processor<br />
MAC<br />
Controller<br />
&<br />
Ethernet<br />
Chipset<br />
Network Interface Unit<br />
<strong>DVB</strong>-<strong>RCS</strong> IP or LANE Gateway<br />
External uP Data/Control Bus<br />
User Devices<br />
Corporate, Prosumer<br />
Ethernet Network<br />
(all IP)<br />
External uP Data/Control Bus<br />
ODU<br />
IDU<br />
St<strong>and</strong>ard PCI, USB<br />
bus<br />
RxTx<br />
Telecoms Earth Network<br />
(Voice, Data)<br />
RX<br />
Unit<br />
(LNB)<br />
TX Unit<br />
(BUC)<br />
IFL<br />
<strong>DVB</strong>-<strong>RCS</strong> Consumer Terminal<br />
Digital &<br />
Analog<br />
Signal<br />
Processing<br />
Functions<br />
Network Interface Unit<br />
Forward &Return<br />
Channel<br />
Protocol<br />
Processor<br />
PCI/USB<br />
System bus<br />
User Terminal<br />
20
End <strong>of</strong> Presentation<br />
Thank You!
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