QDK-nano PIC24/dsPIC-C30 - Quantum Leaps

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QDK-nano PIC24/dsPIC-C30 www.state-machine.com/pic (5) QF_tick(); /* handle all armed time events in QF */ } /* perform other work, if necessary */ (1) In the MPLAB C30 The ISR must be declared with the attribute __interrupt__. (2) The auto_psv attribute will cause the compiler to preserve the previous contents of PSVPAG and set it to section .const. Upon exit, the previous value of PSVPAG will be restored. Alternatively, if the ISR does not access the PSVPAG access, the attribute no_auto_psv can be used (see Section 8.10 in [MPLAB C30] for more details). NOTE: If you don’t explicitly specify the no_auto_psv attribute, the compiler will err on the safe side and will implicitly insert the auto_psv atribute. (3) Every ISR must be a void (void) function. (4) Most ISRs in the PIC24/dsPIC architecture must explicitly clear the interrupt flag for the interrupt source. (5) The system clock tick ISR must invoke QF_tick(), and can also perform other actions, if necessary. The function QF_tick() cannot be reentered, that is, it necessarily must run to completion and return before it can be called again. This requirement is automatically fulfilled, because the same interrupt priority cannot preempt the running priority in PIC24/dsPIC. 3.2.1 PSV Usage in ISRs This QP port to PIC24/dsPIC can work with ISRs that preserve the PSVPAG register as well as ISRs that don’t. The preserving of the PSVPAG register is controlled by the attributes auto_psv and no_auto_psv that the MPLAB C30 compiler supports for this purpose (see Listing 3(2)). If an ISR references const variables or string literals using the constants-in-code memory model, the auto_psv attribute should be added to the ISR definition. This attribute will cause the compiler to preserve the previous contents of PSVPAG and set it to section .const. Upon exit, the previous value of PSVPAG will be restored. Alternatively, if the ISR does not access the PSVPAG access, the attribute no_auto_psv can be used (see Section 8.10 in [MPLAB C30] for more details). The no_auto_psv attribute results in slightly faster ISR with one register less saved on the stack. 3.2.2 Shadow Registers Usage in ISRs The non-preemptive “vanilla” QP-nano port to PIC24/dsPIC can work with ISRs that preserve the context in the shadow registers available in the PIC24/dsPIC CPU. To request the compiler to use the fast context save (using the push.s and pop.s instructions), tag the function with the __shadow__ attribute. For example: void __attribute__((__interrupt__, __shadow__)) _T2Interrupt(void); NOTE: Generally, shadow registers should be used at one IPL level only (typically the highest). When interrupt nesting is allowed, which is the default in the PIC24/dsPIC architecture, the shadow registers can get corrupted if they are used by interrupts of two or more different IPL levels. Copyright © Quantum Leaps, LLC. All Rights Reserved. 12 of 29
QDK-nano PIC24/dsPIC-C30 www.state-machine.com/pic 3.2.3 Assigning/Changing Interrupt Priorities in Software Each ISR in PIC24/dsPIC runs at a pre-configured IPL level. The default IPL level assigned to all ISRs out of reset is 4. It is strongly recommended, however, to assign priority to each used interrupt explicitly before enabling the interrupt. For example, the highlighted code in Listing 4 shows assigning the priority to the Timer2 interrupt in function QF_onStartup(): Listing 4: Configuring interrupts in function QF_onStartup() (file bsp.c) #define TIMER2_ISR_PRIO 4 . . . void QF_onStartup(void) { /* entered with interrupts locked */ T2CON = 0; /* Use Internal Osc (Fcy), 16 bit mode, prescaler = 1 */ TMR2 = 0; /* Start counting from 0 and clear the prescaler count */ PR2 = BSP_TMR2_PERIOD - 1; /* set the timer period */ _T2IP = TIMER2_ISR_PRIO; /* set Timer 2 interrupt priority */ _T2IF = 0; /* clear the interrupt for Timer 2 */ _T2IE = 1; /* enable interrupt for Timer 2 */ T2CONbits.TON = 1; /* start Timer 2 */ } NOTE: All ISRs that call QP services must have priorities not exceeding 6 (1 through 6). Priority 7 is reserved for the NMI, as described in Section 5. 3.3 QP Idle Loop Customization in QF_onIdle() The cooperative “vanilla” kernel can very easily detect the situation when no events are available, in which case QF_run() calls the QF_onIdle() callback. You can use QF_onIdle() to suspended the CPU to save power, if your CPU supports such a power-saving mode. Please note that QF_onIdle() is called repetitively from the event loop whenever the event loop has no more events to process, in which case only an interrupt can provide new events. The QF_onIdle() callback is called with interrupts locked, because the determination of the idle condition might change by any interrupt posting an event. The PIC24/dsPIC CPU supports several power-saving levels (consult the data sheets of particular PIC24/dsPIC devices for details). The following piece of code shows the QF_onIdle() callback that puts PIC24/dsPIC into the IDLE power-saving mode. Please note that PIC24/dsPIC architecture allows for an atomic setting the low-power mode and enabling interrupts at the same time. Listing 5: QF_onIdle() for the non-preemptive (“vanilla”) QP-nano port to PIC24/dsPIC (1) void QF_onIdle(void) { /* entered with int locked, NOTE01 */ (2) LED_ON (IDLE_LED); /* blink the IDLE LED, see NOTE02 */ (3) LED_OFF(IDLE_LED); (4) #ifdef NDEBUG (5) __asm__ volatile("disi #0x0001"); (6) Idle(); /* transition to Idle mode, see NOTE03 */ #else (7) QF_INT_UNLOCK(dummy); /* unlock interrupts, see NOTE01 */ #endif } Copyright © Quantum Leaps, LLC. All Rights Reserved. 13 of 29
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QDK-nano PIC24/dsPIC-C30 - Quantum Leaps

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