QDK-nano PIC24/dsPIC-C30 - Quantum Leaps

QDK-nano
PIC24/dsPIC-C30
www.state-machine.com/pic
include any preemptions by interrupts and tasks). The transition to the Idle mode happens in a very
straightforward way, because transition to idle mode is always safe under a preemptive priority-based
kernel, such as QK.
void QK_onIdle(void) {
Listing 9: QK_onIdle() callback for PIC24/dsPIC.
QF_INT_LOCK();
LED_ON (IDLE_LED); /* blink the IDLE LED, see NOTE01 */
LED_OFF(IDLE_LED);
QF_INT_UNLOCK();
#ifdef NDEBUG
Idle(); /* transition to Idle mode */
#endif
}
4.4 Testing QK Preemption Scenarios
The technique described in this section will allow you to use the MPLAB debugger to trigger an interrupt
at any machine instruction and observe the preemptions it causes. The interrupt used for the testing
purposes is the GPIOA interrupt (INTID == 0). The ISR for this interrupt is shown below:
The DPP example application for the preemptive QK-nano kernel includes special ISR (INT0 ISR) for
convenient testing of various preemption scenarios, defined as follows:
#define INT0_ISR_PRIO 6
QK_ISR(auto_psv) _INT0Interrupt() {
_INT0IF = 0;
QActive_postISR(&AO_Ped, PEDS_WAITING_SIG, 0);
QK_ISR_EXIT(); /* inform QK about exiting the ISR */
}
The INT0 ISR, is assigned priority 6, which is higher than the priority of the system clock tick ISR.
Figure 7 shows how to trigger the INT0 interrupt from the MPLAB debugger. From the debugger you need
to first open the “File Registers” window (menu View | File Registers) as shown in Figure 7. You scroll to
the IFS0 register at address 0x0084. To trigger the INT0 interrupt you need to write 1 to the leastsignificant
bit (bit #0) of the IFS0 register.
The general testing strategy is to break into the application at an interesting place for preemption, set
breakpoints to verify which path through the code is taken, and trigger the INT0 interrupt, as described
above. Next, you need to free-run the code (don’t use single stepping) so that the PIC24/dsPIC CPU can
perform prioritization. You observe the order in which the breakpoints are hit. This procedure will become
clearer after a few examples.
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