QDK-nano PIC24/dsPIC-C30 - Quantum Leaps
QDK-nano PIC24/dsPIC-C30 - Quantum Leaps
QDK-nano PIC24/dsPIC-C30 - Quantum Leaps
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<strong>QDK</strong>-<strong>nano</strong><br />
<strong>PIC24</strong>/<strong>dsPIC</strong>-<strong>C30</strong><br />
www.state-machine.com/pic<br />
(26) 008FE E24885 cp0.b 0x0885<br />
(27) 00900 320003 bra z, 0x000908<br />
(28) 00902 EF6042 clr.b 0x0042<br />
(29) 00904 0700A0 rcall 0x000a46<br />
(30) 00906 880218 mov.w 0x0010,0x0042<br />
(31) 00908 FC0000 disi #0<br />
60: }<br />
(32) 0090A 78044F mov.w [--0x001e],0x0010<br />
(33) 0090C BE034F mov.d [--0x001e],0x000c<br />
(34) 0090E BE024F mov.d [--0x001e],0x0008<br />
(35) 00910 BE014F mov.d [--0x001e],0x0004<br />
(36) 00912 BE004F mov.d [--0x001e],0x0000<br />
(37) 00914 F90036 pop.w 0x0036<br />
(38) 00916 064000 retfie<br />
(1) The RCOUNT register (at address 0x36) is pushed to the stack. This is done to establish the same<br />
stack layout as the MPLAB <strong>C30</strong> compiler does for all ISRs.<br />
(2) The register pair w0-w1 is pushed to the stack. Now these registers can be clobbered.<br />
(3) The stacked SRCORCONPC bits (see Figure 5) are loaded from the stack to w0.<br />
Please note that after pushing RCOUNT and w0,w1 pair, this information is 8 bytes away from the<br />
current stack pointer in w15.<br />
(4) The register w0 is left-shifted by 13 bits, so that the stacked IPL ends up in w1.<br />
(5) The register w1 is compared with zero.<br />
(6) The stacked IPL indicates that an ISR has been preempted, so the corresponding bit in the<br />
QK_intNest_ bitmask needs to be set. Here the bitmask (1