The IA-64 System Architecture - DIG64
The IA-64 System Architecture - DIG64
The IA-64 System Architecture - DIG64
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<strong>IA</strong>-<strong>64</strong> Interruption Process<br />
IP<br />
Application Code<br />
127<br />
0x1000 0x1000 INST INST A<br />
0x1010 0x1010 INST INST B<br />
0x1020 0x1020 INST INST C<br />
32<br />
..<br />
..<br />
1<br />
Restoring Pre-<br />
Interruption State<br />
Processor switches<br />
back to Bank 1 registers<br />
31<br />
IP<br />
RETURN TO<br />
APP CODE<br />
0x4000 0x4000 INST INST X<br />
0x4010 0x4010 INST INST Y<br />
0x4020 0x4020 RFI RFI<br />
..<br />
..<br />
IVT Code<br />
BANK0 REG<br />
BANK1 REG<br />
(OS data)<br />
(app data)<br />
15<br />
0<br />
BANK<br />
SWITCHING<br />
24 BANK0 REG<br />
(OS data)<br />
16<br />
Current Processor State<br />
IP<br />
PSR<br />
.<br />
0x4020<br />
Processor<br />
restores<br />
state<br />
Interruption<br />
Registers<br />
IIP<br />
IPSR<br />
.<br />
0x1010<br />
2<br />
Processor restores<br />
state from interruption<br />
registers before<br />
returning from interrupt<br />
®
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