Semiconductors Inside a Smartphone - india electronics ...

Classical Scaling and Reality
• To maintain generational performance gains, supply voltage is not scaled
ideally, leaving us with major power issues
Voltage
V /
Ideal Scaling
n+
source
tox/
GATE
WIRING
n+
drain
W/
L/
xd/
p substrate, doping *NA
> 1
Reality Scaling
Voltage
V / 1/2
tox/
n+
source
1/2
GATE
L/
n+
drain
p substrate, doping *NA
WIRING
W/
xd/
gate
source SiO 2 drain
n+ channel n+
p-type substrate
Oxide down to only
4 monolayers
SCALING:
Channel L L/
Voltage: V/
Oxide: tox /
Wire width: W/
Gate width: L/
Diffusion: xd /
Substrate: * NA
On Current:
RESULTS:
2
Higher Density: ~
Higher Speed: ~
2
Power/ckt: ~1/
Electric Field 1
Power Density: ~1
SCALING:
Channel L L/
1/2
Voltage: V/
1/2
Oxide: tox /
Wire width: W/
Gate width: L/
Diffusion: xd /
Substrate: * NA
On Current: 1/2
RESULTS:
2
Higher Density: ~
Higher Speed: ~
Power/ckt: ~1/
1/2
Electric Field ~
Power Density: ~
Innovation, scaling, and power to drive performance !
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