Digital Current Control of a Voltage Source Converter With Active ...

WU AND LEHN: DIGITAL CURRENT CONTROL OF A VOLTAGE SOURCE CONVERTER 1365
at relatively low switching frequencies. This new system allows
for the flexible, systematic design approach of pole assignment
while retaining control of the current trajectory, providing transient
overcurrent protection even when the controller’s overall
performance criteria cannot be met [9].
II. SYSTEM MODELING
Assuming that the impedances of the three-phase system of
Fig. 1 are balanced, the differential equations governing the
three-phase voltage and current vectors are
The three-phase vectors , , , , and
in (1)–(3) can be replaced by complex space vectors , ,
, , and in the form by applying
the amplitude-invariant Clarke transformation
(1)
(2)
(3)
(4)
Fig. 2. SPWM with twice-per-period sampling.
The PWM pattern generator generates independent gating
waveforms for each leg of the three-phase converter as shown
in Fig. 2.
With a symmetrical carrier, the desired average terminal
voltage can be reached over half of a switching period ,
during which the voltage command is held and compared to the
triangular carrier to calculate the duty cycle. Hence sampling
occurs twice per switching period at frequency 1 .In
order to accurately model the behavior of the PWM pattern generator
and the digital controller, the differential equations are
discretized by the zero-order hold method. The discrete-time
state-space model is given by [10]
and assuming no zero-sequence currents.
The space-vectors may then be projected onto complex variables
in the synchronously rotating -frame
by performing the substitution
on each
space vector, with synchronous frequency . Assuming
0, the complex -frame differential equations are then
given by
where
(9)
(5)
(6)
(7)
The subscripts will henceforth be dropped for convenience.
Equations (5)–(7) can be now written in state-space form as
(8)
where
Due to finite computation time, the voltage command calculated
during the present timestep must be requested by the controller
during the next timestep. This behavior is modeled as a
one-timestep delay between the converter voltage command
and the terminal voltage
(10)
Considering as a state and as a new input, this delay may
be incorporated into the model by rearranging the state equation
[11]. The augmented state model is then given by
(11)
(12)
where