PCI_PCIe User Guide_RevA.pdf - Symmetricom
PCI_PCIe User Guide_RevA.pdf - Symmetricom
PCI_PCIe User Guide_RevA.pdf - Symmetricom
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1.4. Device Registers<br />
page 43 for more information on the format and use of this register.<br />
MASK Register (0x18)<br />
The TFM supports the seven interrupt sources listed in the following table. Each interrupt source can<br />
be individually masked on or off using the MASK register (0x18). Each interrupt source sets a corresponding<br />
bit in the INTSTAT register (0x1C) when the interrupt occurs.<br />
Bits 0-6 in the MASK register correspond to interrupt sources zero through six listed in the following<br />
table. An interrupt source is enabled (to generate a <strong>PCI</strong> interrupt) by writing a value of one to the corresponding<br />
MASK bit. Writing a zero to the interrupt MASK bit disables that interrupt source.<br />
INTSTAT Register (0x1C)<br />
The INTSTAT register has the same structure as the MASK register listed in the following table. Each<br />
interrupt source sets its corresponding bit in this register when it occurs. The INTSTAT register bits<br />
get set regardless of the state of the MASK bits. INTSTAT bits are cleared by writing to the INTSTAT<br />
register with the corresponding bit(s) set. For example, to clear INTSTAT bit zero, write 0x01 to the<br />
INTSTAT register. To clear all INTSTAT bits simultaneously, write 0x7F to the INTSTAT register.<br />
The corresponding INSTAT bit MUST be cleared in order to enable the next interrupt occurrence.<br />
A <strong>PCI</strong> interrupt is generated anytime one or more INTSTAT bits [0 through 6] are set and the corresponding<br />
bit(s) are set in the MASK register and interrupts have been enabled (started).<br />
INTSTAT Register<br />
Bit<br />
Function<br />
0 Event Input has occurred<br />
1 Periodic/DDS Output has occurred<br />
2 Strobe (time coincidence) has occurred<br />
3 1 PPS output has occurred<br />
4 GPS Data Packet is available (bc637 models only)<br />
5 Signal transition on Event2 Input has occurred<br />
6 Signal transition on Event3 Input has occurred<br />
7-31 Reserved<br />
Note: Register contents are undefined at reset.<br />
MINSTRB (0x20) – MAJSTRB (0x24) Registers<br />
These registers hold the programmed Time Coincidence Strobe time. The contents of these registers<br />
depend on the time format selected. The Strobe time is programmable from hours through microseconds<br />
in the decimal time format. When the time format is set to binary, only the 22 least sig-<br />
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